Sonoma (MAXREFDES14#) Code Documentation V01.00 Isolated EMP (Energy Measurement Processor)

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maximDeviceSpecificUtilities.c
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1
31 /*
32 * Copyright (C) 2012 Maxim Integrated Products, Inc., All Rights Reserved.
33 *
34 * Permission is hereby granted, free of charge, to any person obtaining a
35 * copy of this software and associated documentation files (the "Software"),
36 * to deal in the Software without restriction, including without limitation
37 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
38 * and/or sell copies of the Software, and to permit persons to whom the
39 * Software is furnished to do so, subject to the following conditions:
40 *
41 * The above copyright notice and this permission notice shall be included
42 * in all copies or substantial portions of the Software.
43 *
44 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
45 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
46 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
47 * IN NO EVENT SHALL MAXIM INTEGRATED PRODUCTS BE LIABLE FOR ANY CLAIM, DAMAGES
48 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
49 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
50 * OTHER DEALINGS IN THE SOFTWARE.
51 *
52 * Except as contained in this notice, the name of Maxim Integrated Products
53 * shall not be used except as stated in the Maxim Integrated Products
54 * Branding Policy.
55 *
56 * The mere transfer of this software does not imply any licenses
57 * of trade secrets, proprietary technology, copyrights, patents,
58 * trademarks, maskwork rights, or any other form of intellectual
59 * property whatsoever. Maxim Integrated Products retains all ownership rights.
60 *
61 ***************************************************************************/
62
63 #include "xbasic_types.h"
64 #include "xspips_hw.h" /* SPI device driver */
65 #include "stdio.h"
66 #include "utilities.h"
67
68
69 u32 read_reg(u8 uchRegAddr)
79 {
80 u8 uchRegValue[3];
81 u8 uchSPIWBuffer[2];
82
83 //preparing read command
84 uchSPIWBuffer[0] = uchRegAddr>>6;
85 uchSPIWBuffer[0] = (uchSPIWBuffer[0]<<2)+1;
86 uchSPIWBuffer[1] = 0x3F & uchRegAddr;
87 uchSPIWBuffer[1] = uchSPIWBuffer[1]<<2;
88
89 //Enable manual start, enable manual CS mode, no slave selected
90 //Buad rate = clk / 64, CPOL=1 CPHA=1, enable master mode
91 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xFC3F);//0xFC27
92
93 //Enable the SPI peripheral, and the SS0 pin goes high
94 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x14,0x1);
95
96 //Write a value to the Tx_Data_reg
97 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[0]);
98
99 //Write a value to the Tx_Data_reg
100 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[1]);
101
102 //Write a value to the Tx_Data_reg
103 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,0);
104
105 //Write a value to the Tx_Data_reg
106 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,0);
107
108 //Write a value to the Tx_Data_reg
109 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,0);
110
111 //Assert SS1 pin, SS0 goes low
112 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xC43F);//0xC427
113
114 //start the SPI transaction by writing a 1 to the Man_start_com bit
115 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0x1c43F);//0x1c427
116
117 while((XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x4)&0x4)==0);
118 //SS1 goes high
119 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xFC3F);//0xFC27
120
121 //Read a value from the Rx_Data_reg
122 uchRegValue[0]=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
123 //Read a value from the Rx_Data_reg
124 uchRegValue[0]=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
125 //Read a value from the Rx_Data_reg
126 uchRegValue[0]=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
127 //Read a value from the Rx_Data_reg
128 uchRegValue[1]=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
129 //Read a value from the Rx_Data_reg
130 uchRegValue[2]=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
131
132 return (uchRegValue[0]<<16) + (uchRegValue[1]<<8) + uchRegValue[2];
133
134 }
135
136 void write_reg(u8 uchRegAddr, u32 unRegValue)
147 {
148 u8 uchSPIWBuffer[5];
149 u8 uchDummy;
150
151 //preparing write command
152 uchSPIWBuffer[0] = uchRegAddr>>6;
153 uchSPIWBuffer[0] = (uchSPIWBuffer[0]<<2)+1;
154 uchSPIWBuffer[1] = 0x3F & uchRegAddr;
155 uchSPIWBuffer[1] = (uchSPIWBuffer[1]<<2)+2;
156 uchSPIWBuffer[2] = unRegValue>>16;
157 uchSPIWBuffer[3] = unRegValue>>8;
158 uchSPIWBuffer[4] = unRegValue;
159
160 //Enable manual start, enable manual CS mode, no slave selected
161 //Buad rate = clk / 64, CPOL=1 CPHA=1, enable master mode
162 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xFC3F);//0xFC27
163
164 //Enable the SPI peripheral, and the SS0 pin goes high
165 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x14,0x1);
166
167 //Write a value to the Tx_Data_reg
168 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[0]);
169
170 //Write a value to the Tx_Data_reg
171 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[1]);
172
173 //Write a value to the Tx_Data_reg
174 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[2]);
175
176 //Write a value to the Tx_Data_reg
177 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[3]);
178
179 //Write a value to the Tx_Data_reg
180 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[4]);
181
182 //Assert SS1 pin, SS0 goes low
183 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xC43F);//0xC427
184
185 //start the SPI transaction by writing a 1 to the Man_start_com bit
186 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0x1c43F);//0x1c427
187
188 while((XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x4)&0x4)==0);
189
190 //SS1 goes high
191 XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xFC3F);//0xFC27
192
193 //Read a value from the Rx_Data_reg
194 uchDummy=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
195 //Read a value from the Rx_Data_reg
196 uchDummy=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
197 //Read a value from the Rx_Data_reg
198 uchDummy=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
199 //Read a value from the Rx_Data_reg
200 uchDummy=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
201 //Read a value from the Rx_Data_reg
202 uchDummy=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
203 }