### Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.

Software Version and Target Device
Product Version: | ISE:13.4 (WebPack) - O.87xd | Target Family: | Spartan6
OS Platform: | NT64 | Target Device: | xc6slx9
Project ID (random number) | 6fcaa31e0e5a41849645e838e757a27a.1324A1C8D168464FA4AA3E97868C2DD5.3 | Target Package: | csg324
Registration ID | 207925033_207942168_207929718_461 | Target Speed: | -2
Date Generated | 2013-06-13T13:21:13 | Tool Flow | ISE

User Environment
OS Name | Microsoft Windows 7 , 64-bit | OS Release | Service Pack 1 (build 7601)
CPU Name | Intel(R) Xeon(R) CPU E5620 @ 2.40GHz | CPU Speed | 2394 MHz
CPU Name | Intel(R) Xeon(R) CPU E5620 @ 2.40GHz | CPU Speed | 2394 MHz
OS Name | Microsoft Windows 7 , 64-bit | OS Release | Service Pack 1 (build 7601)
CPU Name | Intel(R) Xeon(R) CPU E5620 @ 2.40GHz | CPU Speed | 2394 MHz
CPU Name | Intel(R) Xeon(R) CPU E5620 @ 2.40GHz | CPU Speed | 2394 MHz

Device Usage Statistics
Macro Statistics | Miscellaneous Statistics | Net Statistics | Site Usage
Multiplexers=4 1-bit 2-to-1 multiplexer=4 | MiscellaneousStatistics AGG_BONDED_IO=78 AGG_IO=78 AGG_LOCED_IO=78 AGG_SLICE=1429 NUM_BONDED_IOB=78 NUM_BSCAN=1 NUM_BSFULL=2889 NUM_BSLUTONLY=1750 NUM_BSREGONLY=396 NUM_BSUSED=5035 NUM_BUFG=2 NUM_BUFIO2=1 NUM_BUFPLL_MCB=1 NUM_DPRAM_O5ANDO6=84 NUM_DPRAM_O6ONLY=4 NUM_DSP48A1=3 NUM_ILOGIC2=3 NUM_IOB_FF=6 NUM_IODRP2=1 NUM_IODRP2_MCB=22 NUM_LOCED_IOB=78 NUM_LOGIC_O5ANDO6=905 NUM_LOGIC_O5ONLY=68 NUM_LOGIC_O6ONLY=3278 NUM_LUT_RT_DRIVES_CARRY4=15 NUM_LUT_RT_DRIVES_FLOP=99 NUM_LUT_RT_EXO5=95 NUM_LUT_RT_EXO6=3 NUM_LUT_RT_O5=87 NUM_LUT_RT_O5ANDO6=16 NUM_LUT_RT_O6=67 NUM_MCB=1 NUM_OLOGIC2=3 NUM_OSERDES2=43 NUM_PLL_ADV=1 NUM_RAMB16BWER=14 NUM_SLICEL=359 NUM_SLICEM=85 NUM_SLICEX=985 NUM_SLICE_CARRY4=143 NUM_SLICE_CONTROLSET=320 NUM_SLICE_CYINIT=5980 NUM_SLICE_F7MUX=260 NUM_SLICE_F8MUX=40 NUM_SLICE_FF=3651 NUM_SLICE_LATCH=1 NUM_SLICE_LATCHLOGIC=8 NUM_SLICE_UNUSEDCTRL=18 NUM_SRL_O5ANDO6=140 NUM_SRL_O5ONLY=1 NUM_SRL_O6ONLY=45 NUM_UNUSABLE_FF_BELS=1194 Xilinx Core axi_gpio_v1_01_b=5 Xilinx Core axi_iic_v1_01_b=2 Xilinx Core axi_interconnect_v1_05_a=2 Xilinx Core axi_s6_ddrx_v1_05_a=1 Xilinx Core axi_spi_v1_02_a=2 Xilinx Core axi_uartlite_v1_02_a=2 Xilinx Core clock_generator_v4_03_a=1 Xilinx Core lmb_bram_if_cntlr_v3_00_b=2 Xilinx Core lmb_v10_v2_00_b=2 Xilinx Core mdm_v2_00_b=1 Xilinx Core microblaze_0_bram_block_elaborate_v1_00_a=1 Xilinx Core microblaze_v8_20_b=1 Xilinx Core proc_sys_reset_v3_00_a=1 | NetStatistics NumNets_Active=7343 NumNets_Gnd=1 NumNets_Vcc=1 NumNodesOfType_Active_BOUNCEACROSS=464 NumNodesOfType_Active_BOUNCEIN=1081 NumNodesOfType_Active_BUFGOUT=2 NumNodesOfType_Active_BUFHINP2OUT=15 NumNodesOfType_Active_BUFIOINP=1 NumNodesOfType_Active_CLKPIN=1504 NumNodesOfType_Active_CLKPINFEED=26 NumNodesOfType_Active_CNTRLPIN=1901 NumNodesOfType_Active_DOUBLE=14968 NumNodesOfType_Active_GENERIC=250 NumNodesOfType_Active_GENERIC1=21 NumNodesOfType_Active_GLOBAL=169 NumNodesOfType_Active_INPUT=1288 NumNodesOfType_Active_IOBIN2OUT=156 NumNodesOfType_Active_IOBINPUT=126 NumNodesOfType_Active_IOBOUTPUT=245 NumNodesOfType_Active_LUTINPUT=20441 NumNodesOfType_Active_OUTBOUND=7315 NumNodesOfType_Active_OUTPUT=7241 NumNodesOfType_Active_PADINPUT=129 NumNodesOfType_Active_PADOUTPUT=46 NumNodesOfType_Active_PINBOUNCE=5478 NumNodesOfType_Active_PINFEED=23889 NumNodesOfType_Active_PINFEED2=71 NumNodesOfType_Active_QUAD=9134 NumNodesOfType_Active_REGINPUT=1682 NumNodesOfType_Active_SINGLE=16313 NumNodesOfType_Gnd_BOUNCEACROSS=19 NumNodesOfType_Gnd_BOUNCEIN=277 NumNodesOfType_Gnd_CLKPIN=1 NumNodesOfType_Gnd_CNTRLPIN=36 NumNodesOfType_Gnd_DOUBLE=62 NumNodesOfType_Gnd_GENERIC=2 NumNodesOfType_Gnd_HGNDOUT=167 NumNodesOfType_Gnd_INPUT=1264 NumNodesOfType_Gnd_IOBIN2OUT=27 NumNodesOfType_Gnd_IOBINPUT=195 NumNodesOfType_Gnd_IOBOUTPUT=2 NumNodesOfType_Gnd_LUTINPUT=222 NumNodesOfType_Gnd_OUTBOUND=52 NumNodesOfType_Gnd_OUTPUT=68 NumNodesOfType_Gnd_PADINPUT=2 NumNodesOfType_Gnd_PINBOUNCE=623 NumNodesOfType_Gnd_PINFEED=1695 NumNodesOfType_Gnd_QUAD=5 NumNodesOfType_Gnd_REGINPUT=103 NumNodesOfType_Gnd_SINGLE=79 NumNodesOfType_Vcc_CLKPIN=6 NumNodesOfType_Vcc_CNTRLPIN=98 NumNodesOfType_Vcc_GENERIC=2 NumNodesOfType_Vcc_HVCCOUT=566 NumNodesOfType_Vcc_INPUT=43 NumNodesOfType_Vcc_IOBIN2OUT=4 NumNodesOfType_Vcc_IOBINPUT=4 NumNodesOfType_Vcc_IOBOUTPUT=2 NumNodesOfType_Vcc_KVCCOUT=119 NumNodesOfType_Vcc_LUTINPUT=1542 NumNodesOfType_Vcc_PADINPUT=2 NumNodesOfType_Vcc_PINBOUNCE=35 NumNodesOfType_Vcc_PINFEED=1681 NumNodesOfType_Vcc_REGINPUT=19 SiteStatistics BUFG-BUFGMUX=2 IOB-IOBM=42 IOB-IOBS=36 IODRP2-IODELAY2=1 IODRP2_MCB-IODELAY2=22 OSERDES2-OLOGIC2=43 SLICEL-SLICEM=161 SLICEX-SLICEL=157 SLICEX-SLICEM=114 | SiteSummary BSCAN=1 BSCAN_BSCAN=1 BUFG=2 BUFG_BUFG=2 BUFIO2=1 BUFIO2_BUFIO2=1 BUFPLL_MCB=1 BUFPLL_MCB_BUFPLL_MCB=1 CARRY4=143 DSP48A1=3 DSP48A1_DSP48A1=3 FF_SR=404 HARD0=23 HARD1=22 ILOGIC2=3 ILOGIC2_IFF=3 IOB=78 IOB_IMUX=46 IOB_INBUF=46 IOB_OUTBUF=70 IODRP2=1 IODRP2_IODRP2=1 IODRP2_MCB=22 IODRP2_MCB_IODRP2_MCB=22 LUT5=1161 LUT6=4230 LUT_OR_MEM5=235 LUT_OR_MEM6=312 MCB=1 MCB_MCB=1 OLOGIC2=3 OLOGIC2_T1USED=3 OLOGIC2_TFF=3 OSERDES2=43 OSERDES2_OSERDES2=43 PAD=78 PLL_ADV=1 PLL_ADV_PLL_ADV=1 PULL_OR_KEEP1=9 RAMB16BWER=14 RAMB16BWER_RAMB16BWER=14 REG_SR=3256 SELMUX2_1=304 SLICEL=359 SLICEM=85 SLICEX=985

Configuration Data
BSCAN_BSCAN JTAG_CHAIN=[2:1] JTAG_TEST=[0:1] BUFIO2_BUFIO2 DIVIDE=[1:1] DIVIDE_BYPASS=[TRUE:1] I_INVERT=[FALSE:1] BUFPLL_MCB_BUFPLL_MCB DIVIDE=[2:1] LOCK_SRC=[LOCK_TO_0:1] DSP48A1 CEA=[CEA_INV:0] [CEA:3] CEB=[CEB_INV:0] [CEB:3] CEC=[CEC:3] [CEC_INV:0] CECARRYIN=[CECARRYIN_INV:0] [CECARRYIN:3] CED=[CED_INV:0] [CED:3] CEM=[CEM_INV:0] [CEM:3] CEOPMODE=[CEOPMODE_INV:0] [CEOPMODE:3] CEP=[CEP:3] [CEP_INV:0] CLK=[CLK:3] [CLK_INV:0] RSTA=[RSTA:3] [RSTA_INV:0] RSTB=[RSTB:3] [RSTB_INV:0] RSTC=[RSTC_INV:0] [RSTC:3] RSTCARRYIN=[RSTCARRYIN_INV:0] [RSTCARRYIN:3] RSTD=[RSTD_INV:0] [RSTD:3] RSTM=[RSTM:3] [RSTM_INV:0] RSTOPMODE=[RSTOPMODE_INV:0] [RSTOPMODE:3] RSTP=[RSTP_INV:0] [RSTP:3] DSP48A1_DSP48A1 A0REG=[0:2] [1:1] A1REG=[0:3] B0REG=[0:2] [1:1] B1REG=[0:3] B_INPUT=[DIRECT:3] CARRYINREG=[0:3] CARRYINSEL=[OPMODE5:3] CARRYOUTREG=[0:3] CEA=[CEA_INV:0] [CEA:3] CEB=[CEB_INV:0] [CEB:3] CEC=[CEC:3] [CEC_INV:0] CECARRYIN=[CECARRYIN_INV:0] [CECARRYIN:3] CED=[CED_INV:0] [CED:3] CEM=[CEM_INV:0] [CEM:3] CEOPMODE=[CEOPMODE_INV:0] [CEOPMODE:3] CEP=[CEP:3] [CEP_INV:0] CLK=[CLK:3] [CLK_INV:0] CREG=[0:3] DREG=[0:3] MREG=[0:1] [1:2] OPMODEREG=[0:3] PREG=[0:1] [1:2] RSTA=[RSTA:3] [RSTA_INV:0] RSTB=[RSTB:3] [RSTB_INV:0] RSTC=[RSTC_INV:0] [RSTC:3] RSTCARRYIN=[RSTCARRYIN_INV:0] [RSTCARRYIN:3] RSTD=[RSTD_INV:0] [RSTD:3] RSTM=[RSTM:3] [RSTM_INV:0] RSTOPMODE=[RSTOPMODE_INV:0] [RSTOPMODE:3] RSTP=[RSTP_INV:0] [RSTP:3] RSTTYPE=[SYNC:3] FF_SR CK=[CK:404] [CK_INV:0] SRINIT=[SRINIT0:386] [SRINIT1:18] SYNC_ATTR=[ASYNC:180] [SYNC:224] ILOGIC2 CLK0=[CLK0_INV:0] [CLK0:3] ILOGIC2_IFF CLK0=[CLK0_INV:0] [CLK0:3] IFFTYPE=[FF:3] SRINIT_Q=[0:3] IOB_OUTBUF DRIVEATTRBOX=[12:28] SLEW=[SLOW:28] SUSPEND=[3STATE:70] IODRP2 IOCLK0=[IOCLK0_INV:0] [IOCLK0:1] IODRP2_IODRP2 COUNTER_WRAPAROUND=[WRAPAROUND:1] DATA_RATE=[SDR:1] DELAYCHAIN_OSC=[FALSE:1] DELAY_SRC=[IO:1] IDELAY_MODE=[NORMAL:1] IDELAY_TYPE=[DEFAULT:1] IOCLK0=[IOCLK0_INV:0] [IOCLK0:1] IODELAY_CHANGE=[CHANGE_ON_DATA:1] SERDES_MODE=[NONE:1] TEST_GLITCH_FILTER=[FALSE:1] IODRP2_MCB IOCLK0=[IOCLK0_INV:0] [IOCLK0:22] IODRP2_MCB_IODRP2_MCB DATA_RATE=[SDR:22] IOCLK0=[IOCLK0_INV:0] [IOCLK0:22] SERDES_MODE=[SLAVE:11] [MASTER:11] LUT_OR_MEM5 CLK=[CLK:225] [CLK_INV:0] LUT_OR_MEM=[LUT:10] [RAM:225] RAMMODE=[SRL16:141] [DPRAM32:84] | LUT_OR_MEM6 CLK=[CLK:273] [CLK_INV:0] LUT_OR_MEM=[LUT:39] [RAM:273] RAMMODE=[SRL16:183] [SRL32:2] [DPRAM32:84] [DPRAM64:4] MCB P0CMDCLK=[P0CMDCLK:1] [P0CMDCLK_INV:0] P0CMDEN=[P0CMDEN:1] [P0CMDEN_INV:0] P0RDCLK=[P0RDCLK:1] [P0RDCLK_INV:0] P0RDEN=[P0RDEN_INV:0] [P0RDEN:1] P0WRCLK=[P0WRCLK_INV:0] [P0WRCLK:1] P0WREN=[P0WREN_INV:0] [P0WREN:1] P1CMDCLK=[P1CMDCLK:1] [P1CMDCLK_INV:0] P1CMDEN=[P1CMDEN_INV:0] [P1CMDEN:1] P1RDCLK=[P1RDCLK_INV:0] [P1RDCLK:1] P1RDEN=[P1RDEN:1] [P1RDEN_INV:0] P1WRCLK=[P1WRCLK_INV:0] [P1WRCLK:1] P1WREN=[P1WREN:1] [P1WREN_INV:0] P2CLK=[P2CLK:1] [P2CLK_INV:0] P2CMDCLK=[P2CMDCLK_INV:0] [P2CMDCLK:1] P2CMDEN=[P2CMDEN:1] [P2CMDEN_INV:0] P2EN=[P2EN:1] [P2EN_INV:0] P3CLK=[P3CLK:1] [P3CLK_INV:0] P3CMDCLK=[P3CMDCLK_INV:0] [P3CMDCLK:1] P3CMDEN=[P3CMDEN_INV:0] [P3CMDEN:1] P3EN=[P3EN_INV:0] [P3EN:1] P4CLK=[P4CLK_INV:0] [P4CLK:1] P4CMDCLK=[P4CMDCLK_INV:0] [P4CMDCLK:1] P4CMDEN=[P4CMDEN_INV:0] [P4CMDEN:1] P4EN=[P4EN_INV:0] [P4EN:1] P5CLK=[P5CLK_INV:0] [P5CLK:1] P5CMDCLK=[P5CMDCLK_INV:0] [P5CMDCLK:1] P5CMDEN=[P5CMDEN:1] [P5CMDEN_INV:0] P5EN=[P5EN_INV:0] [P5EN:1] MCB_MCB ARB_NUM_TIME_SLOTS=[12:1] CAL_BYPASS=[NO:1] CAL_CALIBRATION_MODE=[NOCALIBRATION:1] CAL_CLK_DIV=[1:1] CAL_DELAY=[HALF:1] MEM_ADDR_ORDER=[ROW_BANK_COLUMN:1] MEM_BA_SIZE=[2:1] MEM_BURST_LEN=[4:1] MEM_CAS_LATENCY=[3:1] MEM_CA_SIZE=[10:1] MEM_DDR1_2_ODS=[FULL:1] MEM_DDR2_3_HIGH_TEMP_SR=[NORMAL:1] MEM_DDR2_3_PA_SR=[FULL:1] MEM_DDR2_ADD_LATENCY=[0:1] MEM_DDR2_DIFF_DQS_EN=[YES:1] MEM_DDR2_RTT=[50OHMS:1] MEM_DDR2_WRT_RECOVERY=[5:1] MEM_DDR3_ADD_LATENCY=[OFF:1] MEM_DDR3_AUTO_SR=[ENABLED:1] MEM_DDR3_CAS_LATENCY=[6:1] MEM_DDR3_CAS_WR_LATENCY=[5:1] MEM_DDR3_DYN_WRT_ODT=[OFF:1] MEM_DDR3_ODS=[DIV6:1] MEM_DDR3_RTT=[DIV4:1] MEM_DDR3_WRT_RECOVERY=[5:1] MEM_MDDR_ODS=[FULL:1] MEM_MOBILE_PA_SR=[FULL:1] MEM_MOBILE_TC_SR=[0:1] MEM_RAS_VAL=[8:1] MEM_RA_SIZE=[13:1] MEM_RCD_VAL=[3:1] MEM_RTP_VAL=[2:1] MEM_TYPE=[MDDR:1] MEM_WIDTH=[16:1] MEM_WR_VAL=[3:1] MEM_WTR_VAL=[2:1] P0CMDCLK=[P0CMDCLK:1] [P0CMDCLK_INV:0] P0CMDEN=[P0CMDEN:1] [P0CMDEN_INV:0] P0RDCLK=[P0RDCLK:1] [P0RDCLK_INV:0] P0RDEN=[P0RDEN_INV:0] [P0RDEN:1] P0WRCLK=[P0WRCLK_INV:0] [P0WRCLK:1] P0WREN=[P0WREN_INV:0] [P0WREN:1] P1CMDCLK=[P1CMDCLK:1] [P1CMDCLK_INV:0] P1CMDEN=[P1CMDEN_INV:0] [P1CMDEN:1] P1RDCLK=[P1RDCLK_INV:0] [P1RDCLK:1] P1RDEN=[P1RDEN:1] [P1RDEN_INV:0] P1WRCLK=[P1WRCLK_INV:0] [P1WRCLK:1] P1WREN=[P1WREN:1] [P1WREN_INV:0] P2CLK=[P2CLK:1] [P2CLK_INV:0] P2CMDCLK=[P2CMDCLK_INV:0] [P2CMDCLK:1] P2CMDEN=[P2CMDEN:1] [P2CMDEN_INV:0] P2EN=[P2EN:1] [P2EN_INV:0] P3CLK=[P3CLK:1] [P3CLK_INV:0] P3CMDCLK=[P3CMDCLK_INV:0] [P3CMDCLK:1] P3CMDEN=[P3CMDEN_INV:0] [P3CMDEN:1] P3EN=[P3EN_INV:0] [P3EN:1] P4CLK=[P4CLK_INV:0] [P4CLK:1] P4CMDCLK=[P4CMDCLK_INV:0] [P4CMDCLK:1] P4CMDEN=[P4CMDEN_INV:0] [P4CMDEN:1] P4EN=[P4EN_INV:0] [P4EN:1] P5CLK=[P5CLK_INV:0] [P5CLK:1] P5CMDCLK=[P5CMDCLK_INV:0] [P5CMDCLK:1] P5CMDEN=[P5CMDEN:1] [P5CMDEN_INV:0] P5EN=[P5EN_INV:0] [P5EN:1] PORT_CONFIG=[B32_B32_B32_B32:1] | OLOGIC2 CLK0=[CLK0_INV:0] [CLK0:3] OLOGIC2_TFF CK0=[CK0_INV:0] [CK0:3] SRINIT_TQ=[1:3] TFFTYPE=[FF:3] OSERDES2 CLK0=[CLK0_INV:0] [CLK0:43] OSERDES2_OSERDES2 BYPASS_GCLK_FF=[TRUE:43] CLK0=[CLK0_INV:0] [CLK0:43] DATA_RATE_OQ=[SDR:43] DATA_RATE_OT=[SDR:43] DATA_WIDTH=[2:43] OUTPUT_MODE=[SINGLE_ENDED:42] [DIFFERENTIAL:1] SERDES_MODE=[SLAVE:3] [MASTER:40] TRAIN_PATTERN=[0:26] [5:16] [15:1] PLL_ADV RST=[RST:1] [RST_INV:0] PLL_ADV_PLL_ADV BANDWIDTH=[OPTIMIZED:1] CLK_FEEDBACK=[CLKFBOUT:1] COMPENSATION=[INTERNAL:1] PLL_ADD_LEAKAGE=[2:1] PLL_AVDD_COMP_SET=[2:1] PLL_CLAMP_BYPASS=[FALSE:1] PLL_CLAMP_REF_SEL=[1:1] PLL_CLK0MX=[0:1] PLL_CLK1MX=[0:1] PLL_CLK2MX=[0:1] PLL_CLK3MX=[0:1] PLL_CLK4MX=[0:1] PLL_CLK5MX=[0:1] PLL_CLKBURST_CNT=[0:1] PLL_CLKBURST_ENABLE=[TRUE:1] PLL_CLKCNTRL=[0:1] PLL_CLKFBMX=[0:1] PLL_CLKFBOUT2_EDGE=[TRUE:1] PLL_CLKFBOUT2_NOCOUNT=[TRUE:1] PLL_CLKFBOUT_EDGE=[TRUE:1] PLL_CLKFBOUT_EN=[FALSE:1] PLL_CLKFBOUT_NOCOUNT=[TRUE:1] PLL_CLKOUT0_EDGE=[TRUE:1] PLL_CLKOUT0_EN=[FALSE:1] PLL_CLKOUT0_NOCOUNT=[TRUE:1] PLL_CLKOUT1_EDGE=[TRUE:1] PLL_CLKOUT1_EN=[FALSE:1] PLL_CLKOUT1_NOCOUNT=[TRUE:1] PLL_CLKOUT2_EDGE=[TRUE:1] PLL_CLKOUT2_EN=[FALSE:1] PLL_CLKOUT2_NOCOUNT=[TRUE:1] PLL_CLKOUT3_EDGE=[TRUE:1] PLL_CLKOUT3_EN=[FALSE:1] PLL_CLKOUT3_NOCOUNT=[TRUE:1] PLL_CLKOUT4_EDGE=[TRUE:1] PLL_CLKOUT4_EN=[FALSE:1] PLL_CLKOUT4_NOCOUNT=[TRUE:1] PLL_CLKOUT5_EDGE=[TRUE:1] PLL_CLKOUT5_EN=[FALSE:1] PLL_CLKOUT5_NOCOUNT=[TRUE:1] PLL_CLK_LOST_DETECT=[FALSE:1] PLL_CP=[1:1] PLL_CP_BIAS_TRIP_SHIFT=[TRUE:1] PLL_CP_REPL=[1:1] PLL_CP_RES=[0:1] PLL_DIRECT_PATH_CNTRL=[TRUE:1] PLL_DIVCLK_EDGE=[TRUE:1] PLL_DIVCLK_NOCOUNT=[TRUE:1] PLL_DVDD_COMP_SET=[2:1] PLL_EN=[FALSE:1] PLL_EN_DLY=[TRUE:1] PLL_EN_LEAKAGE=[2:1] PLL_EN_TCLK0=[TRUE:1] PLL_EN_TCLK1=[TRUE:1] PLL_EN_TCLK2=[TRUE:1] PLL_EN_TCLK3=[TRUE:1] PLL_EN_VCO0=[FALSE:1] PLL_EN_VCO1=[FALSE:1] PLL_EN_VCO2=[FALSE:1] PLL_EN_VCO3=[FALSE:1] PLL_EN_VCO4=[FALSE:1] PLL_EN_VCO5=[FALSE:1] PLL_EN_VCO6=[FALSE:1] PLL_EN_VCO7=[FALSE:1] PLL_EN_VCO_DIV1=[FALSE:1] PLL_EN_VCO_DIV6=[TRUE:1] PLL_INTFB=[0:1] PLL_IO_CLKSRC=[0:1] PLL_LFHF=[3:1] PLL_LOCK_FB_DLY=[3:1] PLL_LOCK_REF_DLY=[5:1] PLL_MAN_LF_EN=[TRUE:1] PLL_NBTI_EN=[TRUE:1] PLL_PFD_CNTRL=[8:1] PLL_PFD_DLY=[1:1] PLL_PWRD_CFG=[FALSE:1] PLL_REG_INPUT=[TRUE:1] PLL_RES=[1:1] PLL_SEL_SLIPD=[FALSE:1] PLL_SKEW_CNTRL=[0:1] PLL_TEST_IN_WINDOW=[FALSE:1] PLL_VDD_SEL=[0:1] PLL_VLFHIGH_DIS=[TRUE:1] RST=[RST:1] [RST_INV:0] | PULL_OR_KEEP1 PULLTYPE=[PULLUP:2] [PULLDOWN:7] RAMB16BWER CLKA=[CLKA_INV:0] [CLKA:14] CLKB=[CLKB_INV:0] [CLKB:14] ENA=[ENA_INV:0] [ENA:14] ENB=[ENB_INV:0] [ENB:14] REGCEA=[REGCEA_INV:0] [REGCEA:4] REGCEB=[REGCEB_INV:0] [REGCEB:4] RSTA=[RSTA:14] [RSTA_INV:0] RSTB=[RSTB:14] [RSTB_INV:0] WEA0=[WEA0:14] [WEA0_INV:0] WEA1=[WEA1:14] [WEA1_INV:0] WEA2=[WEA2:14] [WEA2_INV:0] WEA3=[WEA3_INV:0] [WEA3:14] WEB0=[WEB0:14] [WEB0_INV:0] WEB1=[WEB1:14] [WEB1_INV:0] WEB2=[WEB2_INV:0] [WEB2:14] WEB3=[WEB3:14] [WEB3_INV:0] RAMB16BWER_RAMB16BWER CLKA=[CLKA_INV:0] [CLKA:14] CLKB=[CLKB_INV:0] [CLKB:14] DATA_WIDTH_A=[9:12] [36:2] DATA_WIDTH_B=[9:12] [36:2] DOA_REG=[0:14] DOB_REG=[0:14] ENA=[ENA_INV:0] [ENA:14] ENB=[ENB_INV:0] [ENB:14] EN_RSTRAM_A=[TRUE:14] EN_RSTRAM_B=[TRUE:14] RAM_MODE=[TDP:14] REGCEA=[REGCEA_INV:0] [REGCEA:4] REGCEB=[REGCEB_INV:0] [REGCEB:4] RSTA=[RSTA:14] [RSTA_INV:0] RSTB=[RSTB:14] [RSTB_INV:0] RSTTYPE=[SYNC:14] RST_PRIORITY_A=[CE:14] RST_PRIORITY_B=[CE:14] WEA0=[WEA0:14] [WEA0_INV:0] WEA1=[WEA1:14] [WEA1_INV:0] WEA2=[WEA2:14] [WEA2_INV:0] WEA3=[WEA3_INV:0] [WEA3:14] WEB0=[WEB0:14] [WEB0_INV:0] WEB1=[WEB1:14] [WEB1_INV:0] WEB2=[WEB2_INV:0] [WEB2:14] WEB3=[WEB3:14] [WEB3_INV:0] WRITE_MODE_A=[WRITE_FIRST:4] [READ_FIRST:10] WRITE_MODE_B=[WRITE_FIRST:4] [READ_FIRST:10] REG_SR CK=[CK:3233] [CK_INV:23] LATCH_OR_FF=[FF:3247] [LATCH:1] [AND2L:8] SRINIT=[SRINIT0:3078] [SRINIT1:178] SYNC_ATTR=[ASYNC:1181] [SYNC:2075] SLICEL CLK=[CLK:335] [CLK_INV:9] SLICEM CLK=[CLK:85] [CLK_INV:0] SLICEX CLK=[CLK:979] [CLK_INV:3]

Pin Data
BSCAN CAPTURE=1 DRCK=1 SEL=1 SHIFT=1 TDI=1 TDO=1 UPDATE=1 BSCAN_BSCAN CAPTURE=1 DRCK=1 SEL=1 SHIFT=1 TDI=1 TDO=1 UPDATE=1 BUFG I0=2 O=2 BUFG_BUFG I0=2 O=2 BUFIO2 DIVCLK=1 I=1 BUFIO2_BUFIO2 DIVCLK=1 I=1 BUFPLL_MCB GCLK=1 IOCLK0=1 IOCLK1=1 LOCK=1 LOCKED=1 PLLIN0=1 PLLIN1=1 SERDESSTROBE0=1 SERDESSTROBE1=1 BUFPLL_MCB_BUFPLL_MCB GCLK=1 IOCLK0=1 IOCLK1=1 LOCK=1 LOCKED=1 PLLIN0=1 PLLIN1=1 SERDESSTROBE0=1 SERDESSTROBE1=1 CARRY4 CIN=72 CO0=14 CO1=3 CO2=9 CO3=99 CYINIT=71 DI0=120 DI1=121 DI2=120 DI3=99 O0=82 O1=76 O2=70 O3=72 S0=143 S1=127 S2=122 S3=119 DSP48A1 A0=3 A1=3 A10=3 A11=3 A12=3 A13=3 A14=3 A15=3 A16=3 A17=3 A2=3 A3=3 A4=3 A5=3 A6=3 A7=3 A8=3 A9=3 B0=3 B1=3 B10=3 B11=3 B12=3 B13=3 B14=3 B15=3 B16=3 B17=3 B2=3 B3=3 B4=3 B5=3 B6=3 B7=3 B8=3 B9=3 C0=3 C1=3 C10=3 C11=3 C12=3 C13=3 C14=3 C15=3 C16=3 C17=3 C18=3 C19=3 C2=3 C20=3 C21=3 C22=3 C23=3 C24=3 C25=3 C26=3 C27=3 C28=3 C29=3 C3=3 C30=3 C31=3 C32=3 C33=3 C34=3 C35=3 C36=3 C37=3 C38=3 C39=3 C4=3 C40=3 C41=3 C42=3 C43=3 C44=3 C45=3 C46=3 C47=3 C5=3 C6=3 C7=3 C8=3 C9=3 CEA=3 CEB=3 CEC=3 CECARRYIN=3 CED=3 CEM=3 CEOPMODE=3 CEP=3 CLK=3 D0=3 D1=3 D10=3 D11=3 D12=3 D13=3 D14=3 D15=3 D16=3 D17=3 D2=3 D3=3 D4=3 D5=3 D6=3 D7=3 D8=3 D9=3 OPMODE0=3 OPMODE1=3 OPMODE2=3 OPMODE3=3 OPMODE4=3 OPMODE5=3 OPMODE6=3 OPMODE7=3 P0=2 P1=2 P10=2 P11=2 P12=2 P13=2 P14=2 P15=1 P16=1 P17=1 P18=1 P19=1 P2=2 P20=1 P21=1 P22=1 P23=1 P24=1 P25=1 P26=1 P27=1 P28=1 P29=1 P3=2 P30=1 P31=1 P32=1 P33=1 P34=1 P35=1 P36=1 P37=1 P38=1 P39=1 P4=2 P40=1 P41=1 P42=1 P43=1 P44=1 P45=1 P46=1 P47=1 P5=2 P6=2 P7=2 P8=2 P9=2 PCIN0=1 PCIN1=1 PCIN10=1 PCIN11=1 PCIN12=1 PCIN13=1 PCIN14=1 PCIN15=1 PCIN16=1 PCIN17=1 PCIN18=1 PCIN19=1 PCIN2=1 PCIN20=1 PCIN21=1 PCIN22=1 PCIN23=1 PCIN24=1 PCIN25=1 PCIN26=1 PCIN27=1 PCIN28=1 PCIN29=1 PCIN3=1 PCIN30=1 PCIN31=1 PCIN32=1 PCIN33=1 PCIN34=1 PCIN35=1 PCIN36=1 PCIN37=1 PCIN38=1 PCIN39=1 PCIN4=1 PCIN40=1 PCIN41=1 PCIN42=1 PCIN43=1 PCIN44=1 PCIN45=1 PCIN46=1 PCIN47=1 PCIN5=1 PCIN6=1 PCIN7=1 PCIN8=1 PCIN9=1 PCOUT0=1 PCOUT1=1 PCOUT10=1 PCOUT11=1 PCOUT12=1 PCOUT13=1 PCOUT14=1 PCOUT15=1 PCOUT16=1 PCOUT17=1 PCOUT18=1 PCOUT19=1 PCOUT2=1 PCOUT20=1 PCOUT21=1 PCOUT22=1 PCOUT23=1 PCOUT24=1 PCOUT25=1 PCOUT26=1 PCOUT27=1 PCOUT28=1 PCOUT29=1 PCOUT3=1 PCOUT30=1 PCOUT31=1 PCOUT32=1 PCOUT33=1 PCOUT34=1 PCOUT35=1 PCOUT36=1 PCOUT37=1 PCOUT38=1 PCOUT39=1 PCOUT4=1 PCOUT40=1 PCOUT41=1 PCOUT42=1 PCOUT43=1 PCOUT44=1 PCOUT45=1 PCOUT46=1 PCOUT47=1 PCOUT5=1 PCOUT6=1 PCOUT7=1 PCOUT8=1 PCOUT9=1 RSTA=3 RSTB=3 RSTC=3 RSTCARRYIN=3 RSTD=3 RSTM=3 RSTOPMODE=3 RSTP=3 DSP48A1_DSP48A1 A0=3 A1=3 A10=3 A11=3 A12=3 A13=3 A14=3 A15=3 A16=3 A17=3 A2=3 A3=3 A4=3 A5=3 A6=3 A7=3 A8=3 A9=3 B0=3 B1=3 B10=3 B11=3 B12=3 B13=3 B14=3 B15=3 B16=3 B17=3 B2=3 B3=3 B4=3 B5=3 B6=3 B7=3 B8=3 B9=3 C0=3 C1=3 C10=3 C11=3 C12=3 C13=3 C14=3 C15=3 C16=3 C17=3 C18=3 C19=3 C2=3 C20=3 C21=3 C22=3 C23=3 C24=3 C25=3 C26=3 C27=3 C28=3 C29=3 C3=3 C30=3 C31=3 C32=3 C33=3 C34=3 C35=3 C36=3 C37=3 C38=3 C39=3 C4=3 C40=3 C41=3 C42=3 C43=3 C44=3 C45=3 C46=3 C47=3 C5=3 C6=3 C7=3 C8=3 C9=3 CEA=3 CEB=3 CEC=3 CECARRYIN=3 CED=3 CEM=3 CEOPMODE=3 CEP=3 CLK=3 D0=3 D1=3 D10=3 D11=3 D12=3 D13=3 D14=3 D15=3 D16=3 D17=3 D2=3 D3=3 D4=3 D5=3 D6=3 D7=3 D8=3 D9=3 OPMODE0=3 OPMODE1=3 OPMODE2=3 OPMODE3=3 OPMODE4=3 OPMODE5=3 OPMODE6=3 OPMODE7=3 P0=2 P1=2 P10=2 P11=2 P12=2 P13=2 P14=2 P15=1 P16=1 P17=1 P18=1 P19=1 P2=2 P20=1 P21=1 P22=1 P23=1 P24=1 P25=1 P26=1 P27=1 P28=1 P29=1 P3=2 P30=1 P31=1 P32=1 P33=1 P34=1 P35=1 P36=1 P37=1 P38=1 P39=1 P4=2 P40=1 P41=1 P42=1 P43=1 P44=1 P45=1 P46=1 P47=1 P5=2 P6=2 P7=2 P8=2 P9=2 PCIN0=1 PCIN1=1 PCIN10=1 PCIN11=1 PCIN12=1 PCIN13=1 PCIN14=1 PCIN15=1 PCIN16=1 PCIN17=1 PCIN18=1 PCIN19=1 PCIN2=1 PCIN20=1 PCIN21=1 PCIN22=1 PCIN23=1 PCIN24=1 PCIN25=1 PCIN26=1 PCIN27=1 PCIN28=1 PCIN29=1 PCIN3=1 PCIN30=1 PCIN31=1 PCIN32=1 PCIN33=1 PCIN34=1 PCIN35=1 PCIN36=1 PCIN37=1 PCIN38=1 PCIN39=1 PCIN4=1 PCIN40=1 PCIN41=1 PCIN42=1 PCIN43=1 PCIN44=1 PCIN45=1 PCIN46=1 PCIN47=1 PCIN5=1 PCIN6=1 PCIN7=1 PCIN8=1 PCIN9=1 PCOUT0=1 PCOUT1=1 PCOUT10=1 PCOUT11=1 PCOUT12=1 PCOUT13=1 PCOUT14=1 PCOUT15=1 PCOUT16=1 PCOUT17=1 PCOUT18=1 PCOUT19=1 PCOUT2=1 PCOUT20=1 PCOUT21=1 PCOUT22=1 PCOUT23=1 PCOUT24=1 PCOUT25=1 PCOUT26=1 PCOUT27=1 PCOUT28=1 PCOUT29=1 PCOUT3=1 PCOUT30=1 PCOUT31=1 PCOUT32=1 PCOUT33=1 PCOUT34=1 PCOUT35=1 PCOUT36=1 PCOUT37=1 PCOUT38=1 PCOUT39=1 PCOUT4=1 PCOUT40=1 PCOUT41=1 PCOUT42=1 PCOUT43=1 PCOUT44=1 PCOUT45=1 PCOUT46=1 PCOUT47=1 PCOUT5=1 PCOUT6=1 PCOUT7=1 PCOUT8=1 PCOUT9=1 RSTA=3 RSTB=3 RSTC=3 RSTCARRYIN=3 RSTD=3 RSTM=3 RSTOPMODE=3 RSTP=3 FF_SR CE=247 CK=404 D=404 Q=404 SR=227 HARD0 0=23 HARD1 1=22 ILOGIC2 CLK0=3 D=3 FABRICOUT=1 Q4=3 ILOGIC2_IFF CLK0=3 D=3 Q1=3 IOB I=46 O=70 PAD=78 T=63 IOB_IMUX I=46 OUT=46 IOB_INBUF OUT=46 PAD=46 IOB_OUTBUF IN=70 OUT=70 TRI=63 IODRP2 ADD=1 BKST=1 CLK=1 CS=1 DOUT=1 IDATAIN=1 IOCLK0=1 ODATAIN=1 SDI=1 SDO=1 T=1 TOUT=1 IODRP2_IODRP2 ADD=1 BKST=1 CLK=1 CS=1 DOUT=1 IDATAIN=1 IOCLK0=1 ODATAIN=1 SDI=1 SDO=1 T=1 TOUT=1 | IODRP2_MCB ADD=22 AUXADDR0=22 AUXADDR1=22 AUXADDR2=22 AUXADDR3=22 AUXADDR4=22 AUXSDO=22 AUXSDOIN=21 BKST=22 CLK=22 CS=22 DOUT=20 DQSOUTP=20 IDATAIN=20 IOCLK0=22 MEMUPDATE=22 ODATAIN=22 SDI=22 T=22 TOUT=20 IODRP2_MCB_IODRP2_MCB ADD=22 AUXADDR0=22 AUXADDR1=22 AUXADDR2=22 AUXADDR3=22 AUXADDR4=22 AUXSDO=22 AUXSDOIN=21 BKST=22 CLK=22 CS=22 DOUT=20 DQSOUTP=20 IDATAIN=20 IOCLK0=22 MEMUPDATE=22 ODATAIN=22 SDI=22 T=22 TOUT=20 LUT5 A1=422 A2=544 A3=557 A4=481 A5=506 O5=1161 LUT6 A1=1733 A2=2629 A3=3306 A4=3787 A5=3932 A6=4046 O6=4230 LUT_OR_MEM5 A1=227 A2=227 A3=230 A4=230 A5=230 CLK=225 DI1=225 O5=235 WA1=84 WA2=84 WA3=84 WA4=84 WA5=84 WE=225 LUT_OR_MEM6 A1=292 A2=301 A3=305 A4=307 A5=311 A6=312 CLK=273 DI1=6 DI2=267 MC31=7 O6=289 WA1=88 WA2=88 WA3=88 WA4=88 WA5=88 WA6=88 WE=273 MCB ADDR0=1 ADDR1=1 ADDR10=1 ADDR11=1 ADDR12=1 ADDR2=1 ADDR3=1 ADDR4=1 ADDR5=1 ADDR6=1 ADDR7=1 ADDR8=1 ADDR9=1 BA0=1 BA1=1 CAS=1 CKE=1 DQI0=1 DQI1=1 DQI10=1 DQI11=1 DQI12=1 DQI13=1 DQI14=1 DQI15=1 DQI2=1 DQI3=1 DQI4=1 DQI5=1 DQI6=1 DQI7=1 DQI8=1 DQI9=1 DQIOWEN0=1 DQON0=1 DQON1=1 DQON10=1 DQON11=1 DQON12=1 DQON13=1 DQON14=1 DQON15=1 DQON2=1 DQON3=1 DQON4=1 DQON5=1 DQON6=1 DQON7=1 DQON8=1 DQON9=1 DQOP0=1 DQOP1=1 DQOP10=1 DQOP11=1 DQOP12=1 DQOP13=1 DQOP14=1 DQOP15=1 DQOP2=1 DQOP3=1 DQOP4=1 DQOP5=1 DQOP6=1 DQOP7=1 DQOP8=1 DQOP9=1 DQSIOIN=1 DQSIOIP=1 DQSIOWEN90N=1 DQSIOWEN90P=1 IOIDRPADD=1 IOIDRPADDR0=1 IOIDRPADDR1=1 IOIDRPADDR2=1 IOIDRPADDR3=1 IOIDRPADDR4=1 IOIDRPBROADCAST=1 IOIDRPCLK=1 IOIDRPCS=1 IOIDRPSDI=1 IOIDRPSDO=1 IOIDRPTRAIN=1 IOIDRPUPDATE=1 LDMN=1 LDMP=1 P0ARBEN=1 P0CMDBA0=1 P0CMDBA1=1 P0CMDBA2=1 P0CMDBL0=1 P0CMDBL1=1 P0CMDBL2=1 P0CMDBL3=1 P0CMDBL4=1 P0CMDBL5=1 P0CMDCA0=1 P0CMDCA1=1 P0CMDCA10=1 P0CMDCA11=1 P0CMDCA2=1 P0CMDCA3=1 P0CMDCA4=1 P0CMDCA5=1 P0CMDCA6=1 P0CMDCA7=1 P0CMDCA8=1 P0CMDCA9=1 P0CMDCLK=1 P0CMDEN=1 P0CMDFULL=1 P0CMDINSTR0=1 P0CMDINSTR1=1 P0CMDINSTR2=1 P0CMDRA0=1 P0CMDRA1=1 P0CMDRA10=1 P0CMDRA11=1 P0CMDRA12=1 P0CMDRA13=1 P0CMDRA14=1 P0CMDRA2=1 P0CMDRA3=1 P0CMDRA4=1 P0CMDRA5=1 P0CMDRA6=1 P0CMDRA7=1 P0CMDRA8=1 P0CMDRA9=1 P0RDCLK=1 P0RDDATA0=1 P0RDDATA1=1 P0RDDATA10=1 P0RDDATA11=1 P0RDDATA12=1 P0RDDATA13=1 P0RDDATA14=1 P0RDDATA15=1 P0RDDATA16=1 P0RDDATA17=1 P0RDDATA18=1 P0RDDATA19=1 P0RDDATA2=1 P0RDDATA20=1 P0RDDATA21=1 P0RDDATA22=1 P0RDDATA23=1 P0RDDATA24=1 P0RDDATA25=1 P0RDDATA26=1 P0RDDATA27=1 P0RDDATA28=1 P0RDDATA29=1 P0RDDATA3=1 P0RDDATA30=1 P0RDDATA31=1 P0RDDATA4=1 P0RDDATA5=1 P0RDDATA6=1 P0RDDATA7=1 P0RDDATA8=1 P0RDDATA9=1 P0RDEMPTY=1 P0RDEN=1 P0RWRMASK0=1 P0RWRMASK1=1 P0RWRMASK2=1 P0RWRMASK3=1 P0WRCLK=1 P0WRCOUNT1=1 P0WRCOUNT2=1 P0WRCOUNT3=1 P0WRCOUNT4=1 P0WRCOUNT5=1 P0WRCOUNT6=1 P0WRDATA0=1 P0WRDATA1=1 P0WRDATA10=1 P0WRDATA11=1 P0WRDATA12=1 P0WRDATA13=1 P0WRDATA14=1 P0WRDATA15=1 P0WRDATA16=1 P0WRDATA17=1 P0WRDATA18=1 P0WRDATA19=1 P0WRDATA2=1 P0WRDATA20=1 P0WRDATA21=1 P0WRDATA22=1 P0WRDATA23=1 P0WRDATA24=1 P0WRDATA25=1 P0WRDATA26=1 P0WRDATA27=1 P0WRDATA28=1 P0WRDATA29=1 P0WRDATA3=1 P0WRDATA30=1 P0WRDATA31=1 P0WRDATA4=1 P0WRDATA5=1 P0WRDATA6=1 P0WRDATA7=1 P0WRDATA8=1 P0WRDATA9=1 P0WREN=1 P1ARBEN=1 P1CMDBA0=1 P1CMDBA1=1 P1CMDBA2=1 P1CMDBL0=1 P1CMDBL1=1 P1CMDBL2=1 P1CMDBL3=1 P1CMDBL4=1 P1CMDBL5=1 P1CMDCA0=1 P1CMDCA1=1 P1CMDCA10=1 P1CMDCA11=1 P1CMDCA2=1 P1CMDCA3=1 P1CMDCA4=1 P1CMDCA5=1 P1CMDCA6=1 P1CMDCA7=1 P1CMDCA8=1 P1CMDCA9=1 P1CMDCLK=1 P1CMDEN=1 P1CMDINSTR0=1 P1CMDINSTR1=1 P1CMDINSTR2=1 P1CMDRA0=1 P1CMDRA1=1 P1CMDRA10=1 P1CMDRA11=1 P1CMDRA12=1 P1CMDRA13=1 P1CMDRA14=1 P1CMDRA2=1 P1CMDRA3=1 P1CMDRA4=1 P1CMDRA5=1 P1CMDRA6=1 P1CMDRA7=1 P1CMDRA8=1 P1CMDRA9=1 P1RDCLK=1 P1RDEN=1 P1RWRMASK0=1 P1RWRMASK1=1 P1RWRMASK2=1 P1RWRMASK3=1 P1WRCLK=1 P1WRDATA0=1 P1WRDATA1=1 P1WRDATA10=1 P1WRDATA11=1 P1WRDATA12=1 P1WRDATA13=1 P1WRDATA14=1 P1WRDATA15=1 P1WRDATA16=1 P1WRDATA17=1 P1WRDATA18=1 P1WRDATA19=1 P1WRDATA2=1 P1WRDATA20=1 P1WRDATA21=1 P1WRDATA22=1 P1WRDATA23=1 P1WRDATA24=1 P1WRDATA25=1 P1WRDATA26=1 P1WRDATA27=1 P1WRDATA28=1 P1WRDATA29=1 P1WRDATA3=1 P1WRDATA30=1 P1WRDATA31=1 P1WRDATA4=1 P1WRDATA5=1 P1WRDATA6=1 P1WRDATA7=1 P1WRDATA8=1 P1WRDATA9=1 P1WREN=1 P2ARBEN=1 P2CLK=1 P2CMDBA0=1 P2CMDBA1=1 P2CMDBA2=1 P2CMDBL0=1 P2CMDBL1=1 P2CMDBL2=1 P2CMDBL3=1 P2CMDBL4=1 P2CMDBL5=1 P2CMDCA0=1 P2CMDCA1=1 P2CMDCA10=1 P2CMDCA11=1 P2CMDCA2=1 P2CMDCA3=1 P2CMDCA4=1 P2CMDCA5=1 P2CMDCA6=1 P2CMDCA7=1 P2CMDCA8=1 P2CMDCA9=1 P2CMDCLK=1 P2CMDEN=1 P2CMDINSTR0=1 P2CMDINSTR1=1 P2CMDINSTR2=1 P2CMDRA0=1 P2CMDRA1=1 P2CMDRA10=1 P2CMDRA11=1 P2CMDRA12=1 P2CMDRA13=1 P2CMDRA14=1 P2CMDRA2=1 P2CMDRA3=1 P2CMDRA4=1 P2CMDRA5=1 P2CMDRA6=1 P2CMDRA7=1 P2CMDRA8=1 P2CMDRA9=1 P2EN=1 P2WRDATA0=1 P2WRDATA1=1 P2WRDATA10=1 P2WRDATA11=1 P2WRDATA12=1 P2WRDATA13=1 P2WRDATA14=1 P2WRDATA15=1 P2WRDATA16=1 P2WRDATA17=1 P2WRDATA18=1 P2WRDATA19=1 P2WRDATA2=1 P2WRDATA20=1 P2WRDATA21=1 P2WRDATA22=1 P2WRDATA23=1 P2WRDATA24=1 P2WRDATA25=1 P2WRDATA26=1 P2WRDATA27=1 P2WRDATA28=1 P2WRDATA29=1 P2WRDATA3=1 P2WRDATA30=1 P2WRDATA31=1 P2WRDATA4=1 P2WRDATA5=1 P2WRDATA6=1 P2WRDATA7=1 P2WRDATA8=1 P2WRDATA9=1 P2WRMASK0=1 P2WRMASK1=1 P2WRMASK2=1 P2WRMASK3=1 P3ARBEN=1 P3CLK=1 P3CMDBA0=1 P3CMDBA1=1 P3CMDBA2=1 P3CMDBL0=1 P3CMDBL1=1 P3CMDBL2=1 P3CMDBL3=1 P3CMDBL4=1 P3CMDBL5=1 P3CMDCA0=1 P3CMDCA1=1 P3CMDCA10=1 P3CMDCA11=1 P3CMDCA2=1 P3CMDCA3=1 P3CMDCA4=1 P3CMDCA5=1 P3CMDCA6=1 P3CMDCA7=1 P3CMDCA8=1 P3CMDCA9=1 P3CMDCLK=1 P3CMDEN=1 P3CMDINSTR0=1 P3CMDINSTR1=1 P3CMDINSTR2=1 P3CMDRA0=1 P3CMDRA1=1 P3CMDRA10=1 P3CMDRA11=1 P3CMDRA12=1 P3CMDRA13=1 P3CMDRA14=1 P3CMDRA2=1 P3CMDRA3=1 P3CMDRA4=1 P3CMDRA5=1 P3CMDRA6=1 P3CMDRA7=1 P3CMDRA8=1 P3CMDRA9=1 P3EN=1 P3WRDATA0=1 P3WRDATA1=1 P3WRDATA10=1 P3WRDATA11=1 P3WRDATA12=1 P3WRDATA13=1 P3WRDATA14=1 P3WRDATA15=1 P3WRDATA16=1 P3WRDATA17=1 P3WRDATA18=1 P3WRDATA19=1 P3WRDATA2=1 P3WRDATA20=1 P3WRDATA21=1 P3WRDATA22=1 P3WRDATA23=1 P3WRDATA24=1 P3WRDATA25=1 P3WRDATA26=1 P3WRDATA27=1 P3WRDATA28=1 P3WRDATA29=1 P3WRDATA3=1 P3WRDATA30=1 P3WRDATA31=1 P3WRDATA4=1 P3WRDATA5=1 P3WRDATA6=1 P3WRDATA7=1 P3WRDATA8=1 P3WRDATA9=1 P3WRMASK0=1 P3WRMASK1=1 P3WRMASK2=1 P3WRMASK3=1 P4ARBEN=1 P4CLK=1 P4CMDBA0=1 P4CMDBA1=1 P4CMDBA2=1 P4CMDBL0=1 P4CMDBL1=1 P4CMDBL2=1 P4CMDBL3=1 P4CMDBL4=1 P4CMDBL5=1 P4CMDCA0=1 P4CMDCA1=1 P4CMDCA10=1 P4CMDCA11=1 P4CMDCA2=1 P4CMDCA3=1 P4CMDCA4=1 P4CMDCA5=1 P4CMDCA6=1 P4CMDCA7=1 P4CMDCA8=1 P4CMDCA9=1 P4CMDCLK=1 P4CMDEN=1 P4CMDINSTR0=1 P4CMDINSTR1=1 P4CMDINSTR2=1 P4CMDRA0=1 P4CMDRA1=1 P4CMDRA10=1 P4CMDRA11=1 P4CMDRA12=1 P4CMDRA13=1 P4CMDRA14=1 P4CMDRA2=1 P4CMDRA3=1 P4CMDRA4=1 P4CMDRA5=1 P4CMDRA6=1 P4CMDRA7=1 P4CMDRA8=1 P4CMDRA9=1 P4EN=1 P4WRDATA0=1 P4WRDATA1=1 P4WRDATA10=1 P4WRDATA11=1 P4WRDATA12=1 P4WRDATA13=1 P4WRDATA14=1 P4WRDATA15=1 P4WRDATA16=1 P4WRDATA17=1 P4WRDATA18=1 P4WRDATA19=1 P4WRDATA2=1 P4WRDATA20=1 P4WRDATA21=1 P4WRDATA22=1 P4WRDATA23=1 P4WRDATA24=1 P4WRDATA25=1 P4WRDATA26=1 P4WRDATA27=1 P4WRDATA28=1 P4WRDATA29=1 P4WRDATA3=1 P4WRDATA30=1 P4WRDATA31=1 P4WRDATA4=1 P4WRDATA5=1 P4WRDATA6=1 P4WRDATA7=1 P4WRDATA8=1 P4WRDATA9=1 P4WRMASK0=1 P4WRMASK1=1 P4WRMASK2=1 P4WRMASK3=1 P5ARBEN=1 P5CLK=1 P5CMDBA0=1 P5CMDBA1=1 P5CMDBA2=1 P5CMDBL0=1 P5CMDBL1=1 P5CMDBL2=1 P5CMDBL3=1 P5CMDBL4=1 P5CMDBL5=1 P5CMDCA0=1 P5CMDCA1=1 P5CMDCA10=1 P5CMDCA11=1 P5CMDCA2=1 P5CMDCA3=1 P5CMDCA4=1 P5CMDCA5=1 P5CMDCA6=1 P5CMDCA7=1 P5CMDCA8=1 P5CMDCA9=1 P5CMDCLK=1 P5CMDEN=1 P5CMDINSTR0=1 P5CMDINSTR1=1 P5CMDINSTR2=1 P5CMDRA0=1 P5CMDRA1=1 P5CMDRA10=1 P5CMDRA11=1 P5CMDRA12=1 P5CMDRA13=1 P5CMDRA14=1 P5CMDRA2=1 P5CMDRA3=1 P5CMDRA4=1 P5CMDRA5=1 P5CMDRA6=1 P5CMDRA7=1 P5CMDRA8=1 P5CMDRA9=1 P5EN=1 P5WRDATA0=1 P5WRDATA1=1 P5WRDATA10=1 P5WRDATA11=1 P5WRDATA12=1 P5WRDATA13=1 P5WRDATA14=1 P5WRDATA15=1 P5WRDATA16=1 P5WRDATA17=1 P5WRDATA18=1 P5WRDATA19=1 P5WRDATA2=1 P5WRDATA20=1 P5WRDATA21=1 P5WRDATA22=1 P5WRDATA23=1 P5WRDATA24=1 P5WRDATA25=1 P5WRDATA26=1 P5WRDATA27=1 P5WRDATA28=1 P5WRDATA29=1 P5WRDATA3=1 P5WRDATA30=1 P5WRDATA31=1 P5WRDATA4=1 P5WRDATA5=1 P5WRDATA6=1 P5WRDATA7=1 P5WRDATA8=1 P5WRDATA9=1 P5WRMASK0=1 P5WRMASK1=1 P5WRMASK2=1 P5WRMASK3=1 PLLCE0=1 PLLCE1=1 PLLCLK0=1 PLLCLK1=1 PLLLOCK=1 RAS=1 RECAL=1 SELFREFRESHENTER=1 SELFREFRESHMODE=1 SYSRST=1 UDMN=1 UDMP=1 UDQSIOIN=1 UDQSIOIP=1 UIADD=1 UIADDR0=1 UIADDR1=1 UIADDR2=1 UIADDR3=1 UIADDR4=1 UIBROADCAST=1 UICLK=1 UICMD=1 UICMDEN=1 UICMDIN=1 UICS=1 UIDONECAL=1 UIDQCOUNT0=1 UIDQCOUNT1=1 UIDQCOUNT2=1 UIDQCOUNT3=1 UIDQLOWERDEC=1 UIDQLOWERINC=1 UIDQUPPERDEC=1 UIDQUPPERINC=1 UIDRPUPDATE=1 UILDQSDEC=1 UILDQSINC=1 UIREAD=1 UISDI=1 UIUDQSDEC=1 UIUDQSINC=1 UODONECAL=1 UOREFRSHFLAG=1 UOSDO=1 WE=1 | MCB_MCB ADDR0=1 ADDR1=1 ADDR10=1 ADDR11=1 ADDR12=1 ADDR2=1 ADDR3=1 ADDR4=1 ADDR5=1 ADDR6=1 ADDR7=1 ADDR8=1 ADDR9=1 BA0=1 BA1=1 CAS=1 CKE=1 DQI0=1 DQI1=1 DQI10=1 DQI11=1 DQI12=1 DQI13=1 DQI14=1 DQI15=1 DQI2=1 DQI3=1 DQI4=1 DQI5=1 DQI6=1 DQI7=1 DQI8=1 DQI9=1 DQIOWEN0=1 DQON0=1 DQON1=1 DQON10=1 DQON11=1 DQON12=1 DQON13=1 DQON14=1 DQON15=1 DQON2=1 DQON3=1 DQON4=1 DQON5=1 DQON6=1 DQON7=1 DQON8=1 DQON9=1 DQOP0=1 DQOP1=1 DQOP10=1 DQOP11=1 DQOP12=1 DQOP13=1 DQOP14=1 DQOP15=1 DQOP2=1 DQOP3=1 DQOP4=1 DQOP5=1 DQOP6=1 DQOP7=1 DQOP8=1 DQOP9=1 DQSIOIN=1 DQSIOIP=1 DQSIOWEN90N=1 DQSIOWEN90P=1 IOIDRPADD=1 IOIDRPADDR0=1 IOIDRPADDR1=1 IOIDRPADDR2=1 IOIDRPADDR3=1 IOIDRPADDR4=1 IOIDRPBROADCAST=1 IOIDRPCLK=1 IOIDRPCS=1 IOIDRPSDI=1 IOIDRPSDO=1 IOIDRPTRAIN=1 IOIDRPUPDATE=1 LDMN=1 LDMP=1 P0ARBEN=1 P0CMDBA0=1 P0CMDBA1=1 P0CMDBA2=1 P0CMDBL0=1 P0CMDBL1=1 P0CMDBL2=1 P0CMDBL3=1 P0CMDBL4=1 P0CMDBL5=1 P0CMDCA0=1 P0CMDCA1=1 P0CMDCA10=1 P0CMDCA11=1 P0CMDCA2=1 P0CMDCA3=1 P0CMDCA4=1 P0CMDCA5=1 P0CMDCA6=1 P0CMDCA7=1 P0CMDCA8=1 P0CMDCA9=1 P0CMDCLK=1 P0CMDEN=1 P0CMDFULL=1 P0CMDINSTR0=1 P0CMDINSTR1=1 P0CMDINSTR2=1 P0CMDRA0=1 P0CMDRA1=1 P0CMDRA10=1 P0CMDRA11=1 P0CMDRA12=1 P0CMDRA13=1 P0CMDRA14=1 P0CMDRA2=1 P0CMDRA3=1 P0CMDRA4=1 P0CMDRA5=1 P0CMDRA6=1 P0CMDRA7=1 P0CMDRA8=1 P0CMDRA9=1 P0RDCLK=1 P0RDDATA0=1 P0RDDATA1=1 P0RDDATA10=1 P0RDDATA11=1 P0RDDATA12=1 P0RDDATA13=1 P0RDDATA14=1 P0RDDATA15=1 P0RDDATA16=1 P0RDDATA17=1 P0RDDATA18=1 P0RDDATA19=1 P0RDDATA2=1 P0RDDATA20=1 P0RDDATA21=1 P0RDDATA22=1 P0RDDATA23=1 P0RDDATA24=1 P0RDDATA25=1 P0RDDATA26=1 P0RDDATA27=1 P0RDDATA28=1 P0RDDATA29=1 P0RDDATA3=1 P0RDDATA30=1 P0RDDATA31=1 P0RDDATA4=1 P0RDDATA5=1 P0RDDATA6=1 P0RDDATA7=1 P0RDDATA8=1 P0RDDATA9=1 P0RDEMPTY=1 P0RDEN=1 P0RWRMASK0=1 P0RWRMASK1=1 P0RWRMASK2=1 P0RWRMASK3=1 P0WRCLK=1 P0WRCOUNT1=1 P0WRCOUNT2=1 P0WRCOUNT3=1 P0WRCOUNT4=1 P0WRCOUNT5=1 P0WRCOUNT6=1 P0WRDATA0=1 P0WRDATA1=1 P0WRDATA10=1 P0WRDATA11=1 P0WRDATA12=1 P0WRDATA13=1 P0WRDATA14=1 P0WRDATA15=1 P0WRDATA16=1 P0WRDATA17=1 P0WRDATA18=1 P0WRDATA19=1 P0WRDATA2=1 P0WRDATA20=1 P0WRDATA21=1 P0WRDATA22=1 P0WRDATA23=1 P0WRDATA24=1 P0WRDATA25=1 P0WRDATA26=1 P0WRDATA27=1 P0WRDATA28=1 P0WRDATA29=1 P0WRDATA3=1 P0WRDATA30=1 P0WRDATA31=1 P0WRDATA4=1 P0WRDATA5=1 P0WRDATA6=1 P0WRDATA7=1 P0WRDATA8=1 P0WRDATA9=1 P0WREN=1 P1ARBEN=1 P1CMDBA0=1 P1CMDBA1=1 P1CMDBA2=1 P1CMDBL0=1 P1CMDBL1=1 P1CMDBL2=1 P1CMDBL3=1 P1CMDBL4=1 P1CMDBL5=1 P1CMDCA0=1 P1CMDCA1=1 P1CMDCA10=1 P1CMDCA11=1 P1CMDCA2=1 P1CMDCA3=1 P1CMDCA4=1 P1CMDCA5=1 P1CMDCA6=1 P1CMDCA7=1 P1CMDCA8=1 P1CMDCA9=1 P1CMDCLK=1 P1CMDEN=1 P1CMDINSTR0=1 P1CMDINSTR1=1 P1CMDINSTR2=1 P1CMDRA0=1 P1CMDRA1=1 P1CMDRA10=1 P1CMDRA11=1 P1CMDRA12=1 P1CMDRA13=1 P1CMDRA14=1 P1CMDRA2=1 P1CMDRA3=1 P1CMDRA4=1 P1CMDRA5=1 P1CMDRA6=1 P1CMDRA7=1 P1CMDRA8=1 P1CMDRA9=1 P1RDCLK=1 P1RDEN=1 P1RWRMASK0=1 P1RWRMASK1=1 P1RWRMASK2=1 P1RWRMASK3=1 P1WRCLK=1 P1WRDATA0=1 P1WRDATA1=1 P1WRDATA10=1 P1WRDATA11=1 P1WRDATA12=1 P1WRDATA13=1 P1WRDATA14=1 P1WRDATA15=1 P1WRDATA16=1 P1WRDATA17=1 P1WRDATA18=1 P1WRDATA19=1 P1WRDATA2=1 P1WRDATA20=1 P1WRDATA21=1 P1WRDATA22=1 P1WRDATA23=1 P1WRDATA24=1 P1WRDATA25=1 P1WRDATA26=1 P1WRDATA27=1 P1WRDATA28=1 P1WRDATA29=1 P1WRDATA3=1 P1WRDATA30=1 P1WRDATA31=1 P1WRDATA4=1 P1WRDATA5=1 P1WRDATA6=1 P1WRDATA7=1 P1WRDATA8=1 P1WRDATA9=1 P1WREN=1 P2ARBEN=1 P2CLK=1 P2CMDBA0=1 P2CMDBA1=1 P2CMDBA2=1 P2CMDBL0=1 P2CMDBL1=1 P2CMDBL2=1 P2CMDBL3=1 P2CMDBL4=1 P2CMDBL5=1 P2CMDCA0=1 P2CMDCA1=1 P2CMDCA10=1 P2CMDCA11=1 P2CMDCA2=1 P2CMDCA3=1 P2CMDCA4=1 P2CMDCA5=1 P2CMDCA6=1 P2CMDCA7=1 P2CMDCA8=1 P2CMDCA9=1 P2CMDCLK=1 P2CMDEN=1 P2CMDINSTR0=1 P2CMDINSTR1=1 P2CMDINSTR2=1 P2CMDRA0=1 P2CMDRA1=1 P2CMDRA10=1 P2CMDRA11=1 P2CMDRA12=1 P2CMDRA13=1 P2CMDRA14=1 P2CMDRA2=1 P2CMDRA3=1 P2CMDRA4=1 P2CMDRA5=1 P2CMDRA6=1 P2CMDRA7=1 P2CMDRA8=1 P2CMDRA9=1 P2EN=1 P2WRDATA0=1 P2WRDATA1=1 P2WRDATA10=1 P2WRDATA11=1 P2WRDATA12=1 P2WRDATA13=1 P2WRDATA14=1 P2WRDATA15=1 P2WRDATA16=1 P2WRDATA17=1 P2WRDATA18=1 P2WRDATA19=1 P2WRDATA2=1 P2WRDATA20=1 P2WRDATA21=1 P2WRDATA22=1 P2WRDATA23=1 P2WRDATA24=1 P2WRDATA25=1 P2WRDATA26=1 P2WRDATA27=1 P2WRDATA28=1 P2WRDATA29=1 P2WRDATA3=1 P2WRDATA30=1 P2WRDATA31=1 P2WRDATA4=1 P2WRDATA5=1 P2WRDATA6=1 P2WRDATA7=1 P2WRDATA8=1 P2WRDATA9=1 P2WRMASK0=1 P2WRMASK1=1 P2WRMASK2=1 P2WRMASK3=1 P3ARBEN=1 P3CLK=1 P3CMDBA0=1 P3CMDBA1=1 P3CMDBA2=1 P3CMDBL0=1 P3CMDBL1=1 P3CMDBL2=1 P3CMDBL3=1 P3CMDBL4=1 P3CMDBL5=1 P3CMDCA0=1 P3CMDCA1=1 P3CMDCA10=1 P3CMDCA11=1 P3CMDCA2=1 P3CMDCA3=1 P3CMDCA4=1 P3CMDCA5=1 P3CMDCA6=1 P3CMDCA7=1 P3CMDCA8=1 P3CMDCA9=1 P3CMDCLK=1 P3CMDEN=1 P3CMDINSTR0=1 P3CMDINSTR1=1 P3CMDINSTR2=1 P3CMDRA0=1 P3CMDRA1=1 P3CMDRA10=1 P3CMDRA11=1 P3CMDRA12=1 P3CMDRA13=1 P3CMDRA14=1 P3CMDRA2=1 P3CMDRA3=1 P3CMDRA4=1 P3CMDRA5=1 P3CMDRA6=1 P3CMDRA7=1 P3CMDRA8=1 P3CMDRA9=1 P3EN=1 P3WRDATA0=1 P3WRDATA1=1 P3WRDATA10=1 P3WRDATA11=1 P3WRDATA12=1 P3WRDATA13=1 P3WRDATA14=1 P3WRDATA15=1 P3WRDATA16=1 P3WRDATA17=1 P3WRDATA18=1 P3WRDATA19=1 P3WRDATA2=1 P3WRDATA20=1 P3WRDATA21=1 P3WRDATA22=1 P3WRDATA23=1 P3WRDATA24=1 P3WRDATA25=1 P3WRDATA26=1 P3WRDATA27=1 P3WRDATA28=1 P3WRDATA29=1 P3WRDATA3=1 P3WRDATA30=1 P3WRDATA31=1 P3WRDATA4=1 P3WRDATA5=1 P3WRDATA6=1 P3WRDATA7=1 P3WRDATA8=1 P3WRDATA9=1 P3WRMASK0=1 P3WRMASK1=1 P3WRMASK2=1 P3WRMASK3=1 P4ARBEN=1 P4CLK=1 P4CMDBA0=1 P4CMDBA1=1 P4CMDBA2=1 P4CMDBL0=1 P4CMDBL1=1 P4CMDBL2=1 P4CMDBL3=1 P4CMDBL4=1 P4CMDBL5=1 P4CMDCA0=1 P4CMDCA1=1 P4CMDCA10=1 P4CMDCA11=1 P4CMDCA2=1 P4CMDCA3=1 P4CMDCA4=1 P4CMDCA5=1 P4CMDCA6=1 P4CMDCA7=1 P4CMDCA8=1 P4CMDCA9=1 P4CMDCLK=1 P4CMDEN=1 P4CMDINSTR0=1 P4CMDINSTR1=1 P4CMDINSTR2=1 P4CMDRA0=1 P4CMDRA1=1 P4CMDRA10=1 P4CMDRA11=1 P4CMDRA12=1 P4CMDRA13=1 P4CMDRA14=1 P4CMDRA2=1 P4CMDRA3=1 P4CMDRA4=1 P4CMDRA5=1 P4CMDRA6=1 P4CMDRA7=1 P4CMDRA8=1 P4CMDRA9=1 P4EN=1 P4WRDATA0=1 P4WRDATA1=1 P4WRDATA10=1 P4WRDATA11=1 P4WRDATA12=1 P4WRDATA13=1 P4WRDATA14=1 P4WRDATA15=1 P4WRDATA16=1 P4WRDATA17=1 P4WRDATA18=1 P4WRDATA19=1 P4WRDATA2=1 P4WRDATA20=1 P4WRDATA21=1 P4WRDATA22=1 P4WRDATA23=1 P4WRDATA24=1 P4WRDATA25=1 P4WRDATA26=1 P4WRDATA27=1 P4WRDATA28=1 P4WRDATA29=1 P4WRDATA3=1 P4WRDATA30=1 P4WRDATA31=1 P4WRDATA4=1 P4WRDATA5=1 P4WRDATA6=1 P4WRDATA7=1 P4WRDATA8=1 P4WRDATA9=1 P4WRMASK0=1 P4WRMASK1=1 P4WRMASK2=1 P4WRMASK3=1 P5ARBEN=1 P5CLK=1 P5CMDBA0=1 P5CMDBA1=1 P5CMDBA2=1 P5CMDBL0=1 P5CMDBL1=1 P5CMDBL2=1 P5CMDBL3=1 P5CMDBL4=1 P5CMDBL5=1 P5CMDCA0=1 P5CMDCA1=1 P5CMDCA10=1 P5CMDCA11=1 P5CMDCA2=1 P5CMDCA3=1 P5CMDCA4=1 P5CMDCA5=1 P5CMDCA6=1 P5CMDCA7=1 P5CMDCA8=1 P5CMDCA9=1 P5CMDCLK=1 P5CMDEN=1 P5CMDINSTR0=1 P5CMDINSTR1=1 P5CMDINSTR2=1 P5CMDRA0=1 P5CMDRA1=1 P5CMDRA10=1 P5CMDRA11=1 P5CMDRA12=1 P5CMDRA13=1 P5CMDRA14=1 P5CMDRA2=1 P5CMDRA3=1 P5CMDRA4=1 P5CMDRA5=1 P5CMDRA6=1 P5CMDRA7=1 P5CMDRA8=1 P5CMDRA9=1 P5EN=1 P5WRDATA0=1 P5WRDATA1=1 P5WRDATA10=1 P5WRDATA11=1 P5WRDATA12=1 P5WRDATA13=1 P5WRDATA14=1 P5WRDATA15=1 P5WRDATA16=1 P5WRDATA17=1 P5WRDATA18=1 P5WRDATA19=1 P5WRDATA2=1 P5WRDATA20=1 P5WRDATA21=1 P5WRDATA22=1 P5WRDATA23=1 P5WRDATA24=1 P5WRDATA25=1 P5WRDATA26=1 P5WRDATA27=1 P5WRDATA28=1 P5WRDATA29=1 P5WRDATA3=1 P5WRDATA30=1 P5WRDATA31=1 P5WRDATA4=1 P5WRDATA5=1 P5WRDATA6=1 P5WRDATA7=1 P5WRDATA8=1 P5WRDATA9=1 P5WRMASK0=1 P5WRMASK1=1 P5WRMASK2=1 P5WRMASK3=1 PLLCE0=1 PLLCE1=1 PLLCLK0=1 PLLCLK1=1 PLLLOCK=1 RAS=1 RECAL=1 SELFREFRESHENTER=1 SELFREFRESHMODE=1 SYSRST=1 UDMN=1 UDMP=1 UDQSIOIN=1 UDQSIOIP=1 UIADD=1 UIADDR0=1 UIADDR1=1 UIADDR2=1 UIADDR3=1 UIADDR4=1 UIBROADCAST=1 UICLK=1 UICMD=1 UICMDEN=1 UICMDIN=1 UICS=1 UIDONECAL=1 UIDQCOUNT0=1 UIDQCOUNT1=1 UIDQCOUNT2=1 UIDQCOUNT3=1 UIDQLOWERDEC=1 UIDQLOWERINC=1 UIDQUPPERDEC=1 UIDQUPPERINC=1 UIDRPUPDATE=1 UILDQSDEC=1 UILDQSINC=1 UIREAD=1 UISDI=1 UIUDQSDEC=1 UIUDQSINC=1 UODONECAL=1 UOREFRSHFLAG=1 UOSDO=1 WE=1 | OLOGIC2 CLK0=3 T1=3 TQ=3 OLOGIC2_T1USED 0=3 OUT=3 OLOGIC2_TFF CK0=3 D1=3 Q=3 OSERDES2 CLK0=43 D1=43 D2=43 D3=43 D4=43 IOCE=43 OCE=43 OQ=43 RST=43 T1=43 T2=43 T3=43 T4=43 TCE=43 TQ=43 TRAIN=43 OSERDES2_OSERDES2 CLK0=43 D1=43 D2=43 D3=43 D4=43 IOCE=43 OCE=43 OQ=43 RST=43 T1=43 T2=43 T3=43 T4=43 TCE=43 TQ=43 TRAIN=43 PAD PAD=78 PLL_ADV CLKFBIN=1 CLKFBOUT=1 CLKIN1=1 CLKOUT0=1 CLKOUT1=1 CLKOUT2=1 DADDR0=1 DADDR1=1 DADDR2=1 DADDR3=1 DADDR4=1 DCLK=1 DEN=1 DI0=1 DI1=1 DI10=1 DI11=1 DI12=1 DI13=1 DI14=1 DI15=1 DI2=1 DI3=1 DI4=1 DI5=1 DI6=1 DI7=1 DI8=1 DI9=1 DWE=1 LOCKED=1 RST=1 PLL_ADV_PLL_ADV CLKFBIN=1 CLKFBOUT=1 CLKIN1=1 CLKOUT0=1 CLKOUT1=1 CLKOUT2=1 DADDR0=1 DADDR1=1 DADDR2=1 DADDR3=1 DADDR4=1 DCLK=1 DEN=1 DI0=1 DI1=1 DI10=1 DI11=1 DI12=1 DI13=1 DI14=1 DI15=1 DI2=1 DI3=1 DI4=1 DI5=1 DI6=1 DI7=1 DI8=1 DI9=1 DWE=1 LOCKED=1 RST=1 PULL_OR_KEEP1 PAD=9 RAMB16BWER ADDRA0=6 ADDRA1=6 ADDRA10=14 ADDRA11=14 ADDRA12=14 ADDRA13=14 ADDRA2=6 ADDRA3=14 ADDRA4=14 ADDRA5=14 ADDRA6=14 ADDRA7=14 ADDRA8=14 ADDRA9=14 ADDRB0=6 ADDRB1=6 ADDRB10=14 ADDRB11=14 ADDRB12=14 ADDRB13=14 ADDRB2=6 ADDRB3=14 ADDRB4=14 ADDRB5=14 ADDRB6=14 ADDRB7=14 ADDRB8=14 ADDRB9=14 CLKA=14 CLKB=14 DIA0=14 DIA1=14 DIA10=6 DIA11=6 DIA12=6 DIA13=6 DIA14=6 DIA15=6 DIA16=6 DIA17=6 DIA18=6 DIA19=6 DIA2=14 DIA20=6 DIA21=6 DIA22=6 DIA23=6 DIA24=6 DIA25=6 DIA26=6 DIA27=6 DIA28=6 DIA29=6 DIA3=14 DIA30=6 DIA31=6 DIA4=14 DIA5=14 DIA6=14 DIA7=14 DIA8=6 DIA9=6 DIB0=14 DIB1=14 DIB10=6 DIB11=6 DIB12=6 DIB13=6 DIB14=6 DIB15=6 DIB16=6 DIB17=6 DIB18=6 DIB19=6 DIB2=14 DIB20=6 DIB21=6 DIB22=6 DIB23=6 DIB24=6 DIB25=6 DIB26=6 DIB27=6 DIB28=6 DIB29=6 DIB3=14 DIB30=6 DIB31=6 DIB4=14 DIB5=14 DIB6=14 DIB7=14 DIB8=6 DIB9=6 DIPA0=14 DIPA1=6 DIPA2=6 DIPA3=6 DIPB0=14 DIPB1=6 DIPB2=6 DIPB3=6 DOA0=12 DOA1=12 DOA14=2 DOA15=2 DOA16=2 DOA17=2 DOA18=2 DOA19=2 DOA2=12 DOA20=2 DOA21=2 DOA22=2 DOA23=2 DOA24=2 DOA25=2 DOA26=2 DOA27=2 DOA28=2 DOA29=2 DOA3=12 DOA30=2 DOA31=2 DOA4=12 DOA5=12 DOA6=12 DOA7=12 DOB0=4 DOB1=4 DOB2=4 DOB3=4 DOB4=4 DOB5=4 DOB6=4 DOB7=4 ENA=14 ENB=14 REGCEA=4 REGCEB=4 RSTA=14 RSTB=14 WEA0=14 WEA1=14 WEA2=14 WEA3=14 WEB0=14 WEB1=14 WEB2=14 WEB3=14 RAMB16BWER_RAMB16BWER ADDRA0=6 ADDRA1=6 ADDRA10=14 ADDRA11=14 ADDRA12=14 ADDRA13=14 ADDRA2=6 ADDRA3=14 ADDRA4=14 ADDRA5=14 ADDRA6=14 ADDRA7=14 ADDRA8=14 ADDRA9=14 ADDRB0=6 ADDRB1=6 ADDRB10=14 ADDRB11=14 ADDRB12=14 ADDRB13=14 ADDRB2=6 ADDRB3=14 ADDRB4=14 ADDRB5=14 ADDRB6=14 ADDRB7=14 ADDRB8=14 ADDRB9=14 CLKA=14 CLKB=14 DIA0=14 DIA1=14 DIA10=6 DIA11=6 DIA12=6 DIA13=6 DIA14=6 DIA15=6 DIA16=6 DIA17=6 DIA18=6 DIA19=6 DIA2=14 DIA20=6 DIA21=6 DIA22=6 DIA23=6 DIA24=6 DIA25=6 DIA26=6 DIA27=6 DIA28=6 DIA29=6 DIA3=14 DIA30=6 DIA31=6 DIA4=14 DIA5=14 DIA6=14 DIA7=14 DIA8=6 DIA9=6 DIB0=14 DIB1=14 DIB10=6 DIB11=6 DIB12=6 DIB13=6 DIB14=6 DIB15=6 DIB16=6 DIB17=6 DIB18=6 DIB19=6 DIB2=14 DIB20=6 DIB21=6 DIB22=6 DIB23=6 DIB24=6 DIB25=6 DIB26=6 DIB27=6 DIB28=6 DIB29=6 DIB3=14 DIB30=6 DIB31=6 DIB4=14 DIB5=14 DIB6=14 DIB7=14 DIB8=6 DIB9=6 DIPA0=14 DIPA1=6 DIPA2=6 DIPA3=6 DIPB0=14 DIPB1=6 DIPB2=6 DIPB3=6 DOA0=12 DOA1=12 DOA14=2 DOA15=2 DOA16=2 DOA17=2 DOA18=2 DOA19=2 DOA2=12 DOA20=2 DOA21=2 DOA22=2 DOA23=2 DOA24=2 DOA25=2 DOA26=2 DOA27=2 DOA28=2 DOA29=2 DOA3=12 DOA30=2 DOA31=2 DOA4=12 DOA5=12 DOA6=12 DOA7=12 DOB0=4 DOB1=4 DOB2=4 DOB3=4 DOB4=4 DOB5=4 DOB6=4 DOB7=4 ENA=14 ENB=14 REGCEA=4 REGCEB=4 RSTA=14 RSTB=14 WEA0=14 WEA1=14 WEA2=14 WEA3=14 WEB0=14 WEB1=14 WEB2=14 WEB3=14 REG_SR CE=1860 CK=3256 D=3256 Q=3256 SR=2165 SELMUX2_1 0=300 1=300 OUT=304 S0=304 SLICEL A=102 A1=101 A2=164 A3=194 A4=236 A5=244 A6=259 AMUX=74 AQ=150 AX=135 B=143 B1=118 B2=234 B3=257 B4=278 B5=288 B6=300 BMUX=85 BQ=158 BX=126 C=14 C1=124 C2=205 C3=224 C4=292 C5=325 C6=331 CE=182 CIN=71 CLK=344 CMUX=73 COUT=71 CQ=235 CX=295 D=17 D1=170 D2=207 D3=251 D4=273 D5=295 D6=298 DMUX=72 DQ=144 DX=84 SR=281 SLICEM A=68 A1=82 A2=83 A3=85 A4=85 A5=85 A6=85 AI=78 AMUX=58 AQ=38 AX=65 B=67 B1=73 B2=76 B3=77 B4=78 B5=80 B6=80 BI=64 BMUX=59 BQ=21 BX=48 C=62 C1=69 C2=72 C3=72 C4=73 C5=74 C6=74 CE=85 CI=63 CIN=1 CLK=85 CMUX=59 COUT=1 CQ=16 CX=48 D=39 D1=71 D2=72 D3=72 D4=72 D5=73 D6=73 DI=62 DMUX=62 DQ=16 DX=61 SR=25 WE=7 SLICEX A=451 A1=459 A2=637 A3=755 A4=836 A5=863 A6=867 AMUX=207 AQ=775 AX=290 B=445 B1=471 B2=646 B3=748 B4=812 B5=827 B6=820 BMUX=221 BQ=671 BX=250 C=349 C1=344 C2=480 C3=586 C4=635 C5=673 C6=664 CE=485 CLK=982 CMUX=187 CQ=570 CX=211 D=261 D1=260 D2=370 D3=447 D4=481 D5=513 D6=507 DMUX=130 DQ=462 DX=191 SR=667

Tool Usage
Command Line History xst -intstyle ise -ifn <ise_file> ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -bm <fname>.bmm -p xc6slx9-csg324-2 <fname>.ngc <fname>.ngd map -intstyle ise -p xc6slx9-csg324-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf bitgen -intstyle ise -f <fname>.ut <fname>.ncd xst -intstyle ise -ifn <ise_file> ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -bm <fname>.bmm -p xc6slx9-csg324-2 <fname>.ngc <fname>.ngd map -intstyle ise -p xc6slx9-csg324-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf bitgen -intstyle ise -f <fname>.ut <fname>.ncd ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -bm <fname>.bmm -p xc6slx9-csg324-2 <fname>.ngc <fname>.ngd map -intstyle ise -p xc6slx9-csg324-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf bitgen -intstyle ise -f <fname>.ut <fname>.ncd

Software Quality
Run Statistics
Program Name | Runs Started | Runs Finished | Errors | Fatal Errors | Internal Errors | Exceptions | Core Dumps
_impact | 32 | 27 | 0 | 0 | 0 | 0 | 0
arwz | 4 | 4 | 0 | 0 | 0 | 0 | 0
bitgen | 26 | 26 | 0 | 0 | 0 | 0 | 0
bitinit | 17 | 17 | 0 | 0 | 0 | 0 | 0
cse_server | 8 | 8 | 0 | 0 | 0 | 0 | 0
elfcheck | 607 | 597 | 0 | 0 | 0 | 0 | 0
libgen | 49 | 49 | 0 | 0 | 0 | 0 | 0
map | 36 | 28 | 0 | 0 | 0 | 0 | 0
ngc2edif | 357 | 357 | 0 | 0 | 0 | 0 | 0
ngcbuild | 126 | 126 | 0 | 0 | 0 | 0 | 0
ngdbuild | 45 | 42 | 0 | 0 | 0 | 0 | 0
par | 28 | 28 | 0 | 0 | 0 | 0 | 0
platgen | 47 | 37 | 0 | 0 | 0 | 0 | 0
psf2Edward | 16 | 16 | 0 | 0 | 0 | 0 | 0
trce | 28 | 28 | 0 | 0 | 0 | 0 | 0
xdsgen | 14 | 14 | 0 | 0 | 0 | 0 | 0
xps | 158 | 60 | 0 | 0 | 0 | 0 | 0
xst | 270 | 269 | 0 | 0 | 0 | 0 | 0

Project Statistics
PROP_Board=Avnet Spartan-6 LX9 MicroBoard | PROP_Enable_Message_Filtering=false
PROP_FitterReportFormat=HTML | PROP_LastAppliedGoal=Balanced
PROP_LastAppliedStrategy=Xilinx Default (unlocked) | PROP_ManualCompileOrderImp=false
PROP_ProjectDescription=This is the top-level wrapper around the Maxim Peripheral Module Microblaze system. It instantiates the microblaze, clocking, and a multiplexer to share the peripheral module ports amongst the I2C, SPI, GPIO, and UART Microblaze peripherals | PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) | PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL | PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor | PROP_VHDLSourceAnalysisStandard=VHDL-200X
PROP_intProjectCreationTimestamp=2012-07-16T08:56:56 | PROP_intWbtProjectID=1324A1C8D168464FA4AA3E97868C2DD5
PROP_intWbtProjectIteration=3 | PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No | PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=true | PROP_DevFamily=Spartan6
PROP_DevDevice=xc6slx9 | PROP_DevFamilyPMName=spartan6
PROP_DevPackage=csg324 | PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-2 | PROP_PreferredLanguage=Verilog
FILE_UCF=1 | FILE_VERILOG=2
FILE_XPS=1

Unisim Statistics
XST_UNISIM_SUMMARY
XST_NUM_IOBUF=1
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_AND2B1L=4 | NGDBUILD_NUM_BSCAN_SPARTAN6=1 | NGDBUILD_NUM_BUFG=4 | NGDBUILD_NUM_BUFPLL_MCB=1
NGDBUILD_NUM_DSP48A1=3 | NGDBUILD_NUM_FD=658 | NGDBUILD_NUM_FDC=58 | NGDBUILD_NUM_FDCE=57
NGDBUILD_NUM_FDC_1=5 | NGDBUILD_NUM_FDE=1062 | NGDBUILD_NUM_FDE_1=8 | NGDBUILD_NUM_FDP=6
NGDBUILD_NUM_FDR=1421 | NGDBUILD_NUM_FDRE=1328 | NGDBUILD_NUM_FDRE_1=1 | NGDBUILD_NUM_FDS=70
NGDBUILD_NUM_FDSE=109 | NGDBUILD_NUM_GND=24 | NGDBUILD_NUM_IBUF=7 | NGDBUILD_NUM_INV=135
NGDBUILD_NUM_IOBUF=41 | NGDBUILD_NUM_IODRP2=1 | NGDBUILD_NUM_IODRP2_MCB=22 | NGDBUILD_NUM_LD=3
NGDBUILD_NUM_LDC=1 | NGDBUILD_NUM_LUT1=67 | NGDBUILD_NUM_LUT2=526 | NGDBUILD_NUM_LUT3=922
NGDBUILD_NUM_LUT4=855 | NGDBUILD_NUM_LUT5=834 | NGDBUILD_NUM_LUT6=1857 | NGDBUILD_NUM_LUT6_2=80
NGDBUILD_NUM_MCB=1 | NGDBUILD_NUM_MULT_AND=8 | NGDBUILD_NUM_MUXCY=252 | NGDBUILD_NUM_MUXCY_L=247
NGDBUILD_NUM_MUXF7=272 | NGDBUILD_NUM_MUXF8=46 | NGDBUILD_NUM_OBUF=7 | NGDBUILD_NUM_OBUFT=21
NGDBUILD_NUM_OBUFTDS=1 | NGDBUILD_NUM_OSERDES2=42 | NGDBUILD_NUM_PLL_ADV=1 | NGDBUILD_NUM_PULLDOWN=2
NGDBUILD_NUM_RAM16X1D=2 | NGDBUILD_NUM_RAM32M=21 | NGDBUILD_NUM_RAMB16BWER=14 | NGDBUILD_NUM_SRL16=1
NGDBUILD_NUM_SRL16E=100 | NGDBUILD_NUM_SRLC16E=233 | NGDBUILD_NUM_SRLC32E=3 | NGDBUILD_NUM_VCC=19
NGDBUILD_NUM_XORCY=300
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_AND2B1L=4 | NGDBUILD_NUM_BSCAN_SPARTAN6=1 | NGDBUILD_NUM_BUFG=4 | NGDBUILD_NUM_BUFPLL_MCB=1
NGDBUILD_NUM_DSP48A1=3 | NGDBUILD_NUM_FD=658 | NGDBUILD_NUM_FDC=58 | NGDBUILD_NUM_FDCE=57
NGDBUILD_NUM_FDC_1=5 | NGDBUILD_NUM_FDE=1062 | NGDBUILD_NUM_FDE_1=8 | NGDBUILD_NUM_FDP=6
NGDBUILD_NUM_FDR=1421 | NGDBUILD_NUM_FDRE=1328 | NGDBUILD_NUM_FDRE_1=1 | NGDBUILD_NUM_FDS=70
NGDBUILD_NUM_FDSE=109 | NGDBUILD_NUM_GND=24 | NGDBUILD_NUM_IBUF=48 | NGDBUILD_NUM_INV=135
NGDBUILD_NUM_IODRP2=1 | NGDBUILD_NUM_IODRP2_MCB=22 | NGDBUILD_NUM_LD=3 | NGDBUILD_NUM_LDC=1
NGDBUILD_NUM_LUT1=67 | NGDBUILD_NUM_LUT2=526 | NGDBUILD_NUM_LUT3=922 | NGDBUILD_NUM_LUT4=855
NGDBUILD_NUM_LUT5=834 | NGDBUILD_NUM_LUT6=1857 | NGDBUILD_NUM_LUT6_2=80 | NGDBUILD_NUM_MCB=1
NGDBUILD_NUM_MULT_AND=8 | NGDBUILD_NUM_MUXCY=252 | NGDBUILD_NUM_MUXCY_L=247 | NGDBUILD_NUM_MUXF7=272
NGDBUILD_NUM_MUXF8=46 | NGDBUILD_NUM_OBUF=7 | NGDBUILD_NUM_OBUFT=62 | NGDBUILD_NUM_OBUFTDS=1
NGDBUILD_NUM_OSERDES2=42 | NGDBUILD_NUM_PLL_ADV=1 | NGDBUILD_NUM_PULLDOWN=7 | NGDBUILD_NUM_PULLUP=2
NGDBUILD_NUM_RAM32M=21 | NGDBUILD_NUM_RAMB16BWER=14 | NGDBUILD_NUM_SRL16E=101 | NGDBUILD_NUM_SRLC16E=233
NGDBUILD_NUM_SRLC32E=3 | NGDBUILD_NUM_TS_TIMESPEC=1 | NGDBUILD_NUM_VCC=19 | NGDBUILD_NUM_XORCY=300

XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj | -ofn=<design_top> | -ofmt=NGC | -p=xc6slx9-2-csg324
-top=<design_top> | -opt_mode=Speed | -opt_level=1 | -power=NO
-iuc=NO | -keep_hierarchy=No | -netlist_hierarchy=As_Optimized | -rtlview=Yes
-glob_opt=AllClockNets | -read_cores=YES | -write_timing_constraints=NO | -cross_clock_analysis=NO
-bus_delimiter=<> | -slice_utilization_ratio=100 | -bram_utilization_ratio=100 | -dsp_utilization_ratio=100
-reduce_control_sets=Auto | -fsm_extract=YES | -fsm_encoding=Auto | -safe_implementation=No
-fsm_style=LUT | -ram_extract=Yes | -ram_style=Auto | -rom_extract=Yes
-shreg_extract=YES | -rom_style=Auto | -auto_bram_packing=NO | -resource_sharing=YES
-async_to_sync=NO | -use_dsp48=Auto | -iobuf=YES | -max_fanout=100000
-bufg=16 | -register_duplication=YES | -register_balancing=No | -optimize_primitives=NO
-use_clock_enable=Auto | -use_sync_set=Auto | -use_sync_reset=Auto | -iob=Auto
-equivalent_register_removal=YES | -slice_utilization_ratio_maxmargin=5