//-----------------------------------------------------------------------------
// arm_system_stub.v
//-----------------------------------------------------------------------------
   
   
module arm_system_stub
  (
    processing_system7_0_MIO,
    processing_system7_0_PS_SRSTB,
    processing_system7_0_PS_CLK,
    processing_system7_0_PS_PORB,
    processing_system7_0_DDR_Clk,
    processing_system7_0_DDR_Clk_n,
    processing_system7_0_DDR_CKE,
    processing_system7_0_DDR_CS_n,
    processing_system7_0_DDR_RAS_n,
    processing_system7_0_DDR_CAS_n,
    processing_system7_0_DDR_WEB_pin,
    processing_system7_0_DDR_BankAddr,
    processing_system7_0_DDR_Addr,
    processing_system7_0_DDR_ODT,
    processing_system7_0_DDR_DRSTB,
    processing_system7_0_DDR_DQ,
    processing_system7_0_DDR_DM,
    processing_system7_0_DDR_DQS,
    processing_system7_0_DDR_DQS_n,
    processing_system7_0_DDR_VRN,
    processing_system7_0_DDR_VRP,
    //axi_gpio_LED_GPIO_IO_pin,
    led,
    OLED_VBAT,
    OLED_VDD,
    OLED_RESET_B,
    OLED_DATA_COMMAND_B,
    OLED_SCLK,
    OLED_SDIN,
        
    processing_system7_0_SPI1_SS1_O_pin,
    processing_system7_0_SPI1_SS2_O_pin,
    processing_system7_0_SPI1_SCLK_pin,
    processing_system7_0_SPI1_MOSI_pin,
    processing_system7_0_SPI1_MISO_pin,
    processing_system7_0_SPI1_SS_pin
   // OLED_DUMMY_D7,
   // OLED_DUMMY_D6
    //axi_gpio_OLED_GPIO_IO_pin
  );
  inout [53:0] processing_system7_0_MIO;
  input processing_system7_0_PS_SRSTB;
  input processing_system7_0_PS_CLK;
  input processing_system7_0_PS_PORB;
  inout processing_system7_0_DDR_Clk;
  inout processing_system7_0_DDR_Clk_n;
  inout processing_system7_0_DDR_CKE;
  inout processing_system7_0_DDR_CS_n;
  inout processing_system7_0_DDR_RAS_n;
  inout processing_system7_0_DDR_CAS_n;
  output processing_system7_0_DDR_WEB_pin;
  inout [2:0] processing_system7_0_DDR_BankAddr;
  inout [14:0] processing_system7_0_DDR_Addr;
  inout processing_system7_0_DDR_ODT;
  inout processing_system7_0_DDR_DRSTB;
  inout [31:0] processing_system7_0_DDR_DQ;
  inout [3:0] processing_system7_0_DDR_DM;
  inout [3:0] processing_system7_0_DDR_DQS;
  inout [3:0] processing_system7_0_DDR_DQS_n;
  inout processing_system7_0_DDR_VRN;
  inout processing_system7_0_DDR_VRP;
  //inout [7:0] axi_gpio_LED_GPIO_IO_pin;
  output wire [7:0] led;
  //inout [7:0] axi_gpio_OLED_GPIO_IO_pin;
  output wire OLED_VBAT;
  output wire OLED_VDD;
  output wire OLED_RESET_B;
  output wire OLED_DATA_COMMAND_B;
  output wire OLED_SCLK;
  output wire OLED_SDIN;
  //output wire OLED_DUMMY_D7;
  //output wire OLED_DUMMY_D6;
  
  output processing_system7_0_SPI1_SS1_O_pin;  
  output processing_system7_0_SPI1_SS2_O_pin;
  inout processing_system7_0_SPI1_SCLK_pin;
  inout processing_system7_0_SPI1_MOSI_pin;
  inout processing_system7_0_SPI1_MISO_pin;
  inout processing_system7_0_SPI1_SS_pin;
  
  
  wire [7:0] GPIO_OLED;
  wire [7:0] GPIO_LED;
  wire [7:0] customled;
  //assign OLED_DUMMY_D7 = GPIO_OLED[7];
  //assign OLED_DUMMY_D6 = GPIO_OLED[6];  
  assign OLED_VBAT = GPIO_OLED[5];
  assign OLED_VDD = GPIO_OLED[4];
  assign OLED_RESET_B = GPIO_OLED[3];
  assign OLED_DATA_COMMAND_B = GPIO_OLED[2];
  assign OLED_SDIN = GPIO_OLED[1];
  assign OLED_SCLK = GPIO_OLED[0];
  assign led[7:0] = GPIO_LED;

  (* BOX_TYPE = "user_black_box" *)
  arm_system
    arm_system_i (
      .processing_system7_0_MIO ( processing_system7_0_MIO ),
      .processing_system7_0_PS_SRSTB ( processing_system7_0_PS_SRSTB ),
      .processing_system7_0_PS_CLK ( processing_system7_0_PS_CLK ),
      .processing_system7_0_PS_PORB ( processing_system7_0_PS_PORB ),
      .processing_system7_0_DDR_Clk ( processing_system7_0_DDR_Clk ),
      .processing_system7_0_DDR_Clk_n ( processing_system7_0_DDR_Clk_n ),
      .processing_system7_0_DDR_CKE ( processing_system7_0_DDR_CKE ),
      .processing_system7_0_DDR_CS_n ( processing_system7_0_DDR_CS_n ),
      .processing_system7_0_DDR_RAS_n ( processing_system7_0_DDR_RAS_n ),
      .processing_system7_0_DDR_CAS_n ( processing_system7_0_DDR_CAS_n ),
      .processing_system7_0_DDR_WEB_pin ( processing_system7_0_DDR_WEB_pin ),
      .processing_system7_0_DDR_BankAddr ( processing_system7_0_DDR_BankAddr ),
      .processing_system7_0_DDR_Addr ( processing_system7_0_DDR_Addr ),
      .processing_system7_0_DDR_ODT ( processing_system7_0_DDR_ODT ),
      .processing_system7_0_DDR_DRSTB ( processing_system7_0_DDR_DRSTB ),
      .processing_system7_0_DDR_DQ ( processing_system7_0_DDR_DQ ),
      .processing_system7_0_DDR_DM ( processing_system7_0_DDR_DM ),
      .processing_system7_0_DDR_DQS ( processing_system7_0_DDR_DQS ),
      .processing_system7_0_DDR_DQS_n ( processing_system7_0_DDR_DQS_n ),
      .processing_system7_0_DDR_VRN ( processing_system7_0_DDR_VRN ),
      .processing_system7_0_DDR_VRP ( processing_system7_0_DDR_VRP ),
      .axi_gpio_OLED_GPIO_IO_O_pin ( GPIO_OLED[7:0] ),
      .axi_gpio_LED_GPIO_IO_pin ( GPIO_LED ),     // output [0:6] led_ip_0_led_pin;
      .processing_system7_0_SPI1_SS1_O_pin ( processing_system7_0_SPI1_SS1_O_pin ),     // output processing_system7_0_SPI1_SS1_O_pin;
      .processing_system7_0_SPI1_SS2_O_pin ( processing_system7_0_SPI1_SS2_O_pin ),     // output processing_system7_0_SPI1_SS2_O_pin;
      .processing_system7_0_SPI1_SCLK_pin ( processing_system7_0_SPI1_SCLK_pin ),     // inout processing_system7_0_SPI1_SCLK_pin;
      .processing_system7_0_SPI1_MOSI_pin ( processing_system7_0_SPI1_MOSI_pin ),     // inout processing_system7_0_SPI1_MOSI_pin;
      .processing_system7_0_SPI1_MISO_pin ( processing_system7_0_SPI1_MISO_pin ),     // inout processing_system7_0_SPI1_MISO_pin;
      .processing_system7_0_SPI1_SS_pin ( processing_system7_0_SPI1_SS_pin )     // inout processing_system7_0_SPI1_SS_pin;
    );

endmodule

