
/*******************************************************************
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 13.4 EDK_O.87xd
* DO NOT EDIT.
*
* Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved.

* 
* Description: Driver configuration
*
*******************************************************************/

#include "xparameters.h"
#include "xuartlite.h"

/*
* The configuration table for devices
*/

XUartLite_Config XUartLite_ConfigTable[] =
{
	{
		XPAR_AXI_UARTLITE_0_DEVICE_ID,
		XPAR_AXI_UARTLITE_0_BASEADDR,
		XPAR_AXI_UARTLITE_0_BAUDRATE,
		XPAR_AXI_UARTLITE_0_USE_PARITY,
		XPAR_AXI_UARTLITE_0_ODD_PARITY,
		XPAR_AXI_UARTLITE_0_DATA_BITS
	},
	{
		XPAR_DEBUG_MODULE_DEVICE_ID,
		XPAR_DEBUG_MODULE_BASEADDR,
		XPAR_DEBUG_MODULE_BAUDRATE,
		XPAR_DEBUG_MODULE_USE_PARITY,
		XPAR_DEBUG_MODULE_ODD_PARITY,
		XPAR_DEBUG_MODULE_DATA_BITS
	},
	{
		XPAR_USB_UART_DEVICE_ID,
		XPAR_USB_UART_BASEADDR,
		XPAR_USB_UART_BAUDRATE,
		XPAR_USB_UART_USE_PARITY,
		XPAR_USB_UART_ODD_PARITY,
		XPAR_USB_UART_DATA_BITS
	}
};


