/** \file maximDeviceSpecificUtilities.c ****************************************
 *
 *             Project: Sonoma (MAXREFDES14#)
 *            Filename: maximDeviceSpecificUtilities.c
 *         Description: This module uses the Zynq SPI peripheral to make
 *                      custom functions for the Sonoma MAXREFDES14#.  These
 *                      low level functions could be cut/pasted into the user's
 *                      application as a starting point for development of an end
 *                      application.
 *
*    Revision History:
 *\n                    05-31-13    Rev 01.00    GL    Initial Release
 *
 *  --------------------------------------------------------------------
 *
 *  This code follows the following naming conventions:
 *
 *\n    char                    chPmodValue
 *\n    char (array)            sPmodString[16]
 *\n    float                   fPmodValue
 *\n    int                     nPmodValue
 *\n    int (array)             anPmodValue[16]
 *\n    u16                     uPmodValue
 *\n    u16 (array)             auPmodValue[16]
 *\n    u8                      uchPmodValue
 *\n    u8 (array)              auchPmodBuffer[16]
 *\n    unsigned int            unPmodValue
 *\n    int *                   punPmodValue
 *
 *  ------------------------------------------------------------------------- */
/*
 * Copyright (C) 2012 Maxim Integrated Products, Inc., All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY,  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 * IN NO EVENT SHALL MAXIM INTEGRATED PRODUCTS BE LIABLE FOR ANY CLAIM, DAMAGES
 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Except as contained in this notice, the name of Maxim Integrated Products
 * shall not be used except as stated in the Maxim Integrated Products
 * Branding Policy.
 *
 * The mere transfer of this software does not imply any licenses
 * of trade secrets, proprietary technology, copyrights, patents,
 * trademarks, maskwork rights, or any other form of intellectual
 * property whatsoever. Maxim Integrated Products retains all ownership rights.
 *
 ***************************************************************************/

#include "xbasic_types.h"
#include "xspips_hw.h"		/* SPI device driver */
#include "stdio.h"
#include "utilities.h"


u32 read_reg(u8 uchRegAddr)
/**
* \brief       Reads the value of a register and display the data via the HyperTerminal
* \par         Details
*              Reads the value of a register and display the data via the HyperTerminal
*
* \param[in]   uchRegAddr      - Register Address
*
* \retval      Register Value
*/
{
	u8 uchRegValue[3];
	u8 uchSPIWBuffer[2];

	//preparing read command
	uchSPIWBuffer[0] = uchRegAddr>>6;
	uchSPIWBuffer[0] = (uchSPIWBuffer[0]<<2)+1;
	uchSPIWBuffer[1] = 0x3F & uchRegAddr;
	uchSPIWBuffer[1] = uchSPIWBuffer[1]<<2;

	//Enable manual start, enable manual CS mode, no slave selected
	//Buad rate = clk / 64, CPOL=1 CPHA=1, enable master mode
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xFC3F);//0xFC27

	//Enable the SPI peripheral, and the SS0 pin goes high
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x14,0x1);

	//Write a value to the Tx_Data_reg
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[0]);

	//Write a value to the Tx_Data_reg
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[1]);

	//Write a value to the Tx_Data_reg
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,0);

	//Write a value to the Tx_Data_reg
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,0);

	//Write a value to the Tx_Data_reg
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,0);

	//Assert SS1 pin, SS0 goes low
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xC43F);//0xC427

	//start the SPI transaction by writing a 1 to the Man_start_com bit
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0x1c43F);//0x1c427

	while((XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x4)&0x4)==0);
	//SS1 goes high
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xFC3F);//0xFC27

	//Read a value from the Rx_Data_reg
	uchRegValue[0]=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
	//Read a value from the Rx_Data_reg
	uchRegValue[0]=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
	//Read a value from the Rx_Data_reg
	uchRegValue[0]=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
	//Read a value from the Rx_Data_reg
	uchRegValue[1]=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
	//Read a value from the Rx_Data_reg
	uchRegValue[2]=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);

	return (uchRegValue[0]<<16) + (uchRegValue[1]<<8) + uchRegValue[2];

}

void write_reg(u8 uchRegAddr, u32 unRegValue)
/**
* \brief       Write a value to a register
* \par         Details
*              Write a value to a register
*
* \param[in]   uchRegAddr      - Register Address
* \param[in]   uchRegAddr      - Register Value
*
* \retval      None
*/
{
	u8 uchSPIWBuffer[5];
	u8 uchDummy;

	//preparing write command
	uchSPIWBuffer[0] = uchRegAddr>>6;
	uchSPIWBuffer[0] = (uchSPIWBuffer[0]<<2)+1;
	uchSPIWBuffer[1] = 0x3F & uchRegAddr;
	uchSPIWBuffer[1] = (uchSPIWBuffer[1]<<2)+2;
	uchSPIWBuffer[2] = unRegValue>>16;
	uchSPIWBuffer[3] = unRegValue>>8;
	uchSPIWBuffer[4] = unRegValue;

	//Enable manual start, enable manual CS mode, no slave selected
	//Buad rate = clk / 64, CPOL=1 CPHA=1, enable master mode
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xFC3F);//0xFC27

	//Enable the SPI peripheral, and the SS0 pin goes high
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x14,0x1);

	//Write a value to the Tx_Data_reg
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[0]);

	//Write a value to the Tx_Data_reg
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[1]);

	//Write a value to the Tx_Data_reg
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[2]);

	//Write a value to the Tx_Data_reg
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[3]);

	//Write a value to the Tx_Data_reg
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x1C,uchSPIWBuffer[4]);

	//Assert SS1 pin, SS0 goes low
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xC43F);//0xC427

	//start the SPI transaction by writing a 1 to the Man_start_com bit
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0x1c43F);//0x1c427

	while((XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x4)&0x4)==0);

	//SS1 goes high
	XSpiPs_WriteReg(XPAR_PS7_SPI_1_BASEADDR,0x0,0xFC3F);//0xFC27

	//Read a value from the Rx_Data_reg
	uchDummy=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
	//Read a value from the Rx_Data_reg
	uchDummy=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
	//Read a value from the Rx_Data_reg
	uchDummy=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
	//Read a value from the Rx_Data_reg
	uchDummy=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
	//Read a value from the Rx_Data_reg
	uchDummy=XSpiPs_ReadReg(XPAR_PS7_SPI_1_BASEADDR,0x20);
}
