axi_max11046 Project Status
Project File: axi_max11046.xise Parser Errors: No Errors
Module Name: axi_max11046 Implementation State: Synthesized
Target Device: xc7z020-1clg484
  • Errors:
 No Errors
Product Version:ISE 14.2
  • Warnings:
 2 Warnings (0 new)
Design Goal: Balanced
  • Routing Results:
  
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
  
Environment: System Settings
  • Final Timing Score:
   
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentThu Sep 12 16:22:24 201302 Warnings (0 new)0
Translation Report     
Map Report     
Place and Route Report     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated

Date Generated: 12/24/2013 - 12:59:52